2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm-offsets.h>
39 *************************************************************************
41 * Jump vector table as in table 3.1 in [1]
43 *************************************************************************
50 ldr pc, _undefined_instruction
51 ldr pc, _software_interrupt
52 ldr pc, _prefetch_abort
58 _undefined_instruction:
59 .word undefined_instruction
61 .word software_interrupt
73 .balignl 16,0xdeadbeef
78 *************************************************************************
80 * Startup Code (reset vector)
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
87 *************************************************************************
92 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
93 .word CONFIG_SPL_TEXT_BASE
95 .word CONFIG_SYS_TEXT_BASE
99 * These are defined in the board-specific linker script.
100 * Subtracting _start from them lets the linker put their
101 * relative position in the executable instead of leaving
104 .globl _bss_start_ofs
106 .word __bss_start - _start
110 .word __bss_end - _start
116 #ifdef CONFIG_USE_IRQ
117 /* IRQ stack memory (calculated at run-time) */
118 .globl IRQ_STACK_START
122 /* IRQ stack memory (calculated at run-time) */
123 .globl FIQ_STACK_START
128 /* IRQ stack memory (calculated at run-time) + 8 bytes */
129 .globl IRQ_STACK_START_IN
134 * the actual reset code
139 * set the cpu to SVC32 mode
147 * we do sys-critical inits only at reboot,
148 * not when booting from ram!
150 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
156 /*------------------------------------------------------------------------------*/
158 #ifndef CONFIG_SPL_BUILD
160 * void relocate_code(addr_moni)
162 * This function relocates the monitor code.
166 mov r6, r0 /* save addr of destination */
169 subs r9, r6, r0 /* r9 <- relocation offset */
170 beq relocate_done /* skip relocation */
171 mov r1, r6 /* r1 <- scratch for copy_loop */
172 ldr r3, _image_copy_end_ofs
173 add r2, r0, r3 /* r2 <- source end address */
176 ldmia r0!, {r10-r11} /* copy from source address [r0] */
177 stmia r1!, {r10-r11} /* copy to target address [r1] */
178 cmp r0, r2 /* until source end address [r2] */
182 * fix .rel.dyn relocations
184 ldr r0, _TEXT_BASE /* r0 <- Text base */
185 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
186 add r10, r10, r0 /* r10 <- sym table in FLASH */
187 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
188 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
189 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
190 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
192 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
193 add r0, r0, r9 /* r0 <- location to fix up in RAM */
196 cmp r7, #23 /* relative fixup? */
198 cmp r7, #2 /* absolute fixup? */
200 /* ignore unknown type of fixup */
203 /* absolute fix: set location to (offset) symbol value */
204 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
205 add r1, r10, r1 /* r1 <- address of symbol in table */
206 ldr r1, [r1, #4] /* r1 <- symbol value */
207 add r1, r1, r9 /* r1 <- relocated sym addr */
210 /* relative fix: increase location by offset */
215 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
224 .word __image_copy_end - _start
226 .word __rel_dyn_start - _start
228 .word __rel_dyn_end - _start
230 .word __dynsym_start - _start
234 .globl c_runtime_cpu_setup
240 *************************************************************************
242 * CPU_init_critical registers
244 * setup important registers
245 * setup memory timing
247 *************************************************************************
251 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
254 * flush v4 I/D caches
257 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
258 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
261 * disable MMU stuff and caches
263 mrc p15, 0, r0, c1, c0, 0
264 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
265 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
266 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
267 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
268 mcr p15, 0, r0, c1, c0, 0
271 * Go setup Memory and board specific bits prior to relocation.
273 mov ip, lr /* perserve link reg across call */
274 bl lowlevel_init /* go setup memory */
275 mov lr, ip /* restore link */
276 mov pc, lr /* back to my caller */
279 *************************************************************************
283 *************************************************************************
289 #define S_FRAME_SIZE 72
311 #define MODE_SVC 0x13
315 * use bad_save_user_regs for abort/prefetch/undef/swi ...
316 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
319 .macro bad_save_user_regs
320 @ carve out a frame on current user stack
321 sub sp, sp, #S_FRAME_SIZE
322 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
324 ldr r2, IRQ_STACK_START_IN
325 @ get values for "aborted" pc and cpsr (into parm regs)
327 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
330 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
331 mov r0, sp @ save current stack into r0 (param register)
334 .macro irq_save_user_regs
335 sub sp, sp, #S_FRAME_SIZE
336 stmia sp, {r0 - r12} @ Calling r0-r12
337 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
339 stmdb r8, {sp, lr}^ @ Calling SP, LR
340 str lr, [r8, #0] @ Save calling PC
342 str r6, [r8, #4] @ Save CPSR
343 str r0, [r8, #8] @ Save OLD_R0
347 .macro irq_restore_user_regs
348 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
350 ldr lr, [sp, #S_PC] @ Get PC
351 add sp, sp, #S_FRAME_SIZE
352 subs pc, lr, #4 @ return & move spsr_svc into cpsr
356 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
358 str lr, [r13] @ save caller lr in position 0 of saved stack
359 mrs lr, spsr @ get the spsr
360 str lr, [r13, #4] @ save spsr in position 1 of saved stack
361 mov r13, #MODE_SVC @ prepare SVC-Mode
363 msr spsr, r13 @ switch modes, make sure moves will execute
364 mov lr, pc @ capture return pc
365 movs pc, lr @ jump to next instruction & switch modes.
368 .macro get_irq_stack @ setup IRQ stack
369 ldr sp, IRQ_STACK_START
372 .macro get_fiq_stack @ setup FIQ stack
373 ldr sp, FIQ_STACK_START
380 undefined_instruction:
383 bl do_undefined_instruction
389 bl do_software_interrupt
409 #ifdef CONFIG_USE_IRQ
416 irq_restore_user_regs
421 /* someone ought to write a more effiction fiq_save_user_regs */
424 irq_restore_user_regs
442 # ifdef CONFIG_INTEGRATOR
444 /* Satisfied by general board level routine */
452 ldr r1, rstctl1 /* get clkm1 reset ctl */
454 strh r3, [r1] /* clear it */
456 strh r3, [r1] /* force dsp+arm reset */
463 #endif /* #ifdef CONFIG_INTEGRATOR */