3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Lei Wen <leiwen@marvell.com>,
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
27 #include <asm/arch/pantheon.h>
29 DECLARE_GLOBAL_DATA_PTR;
32 * Pantheon DRAM controller supports upto 8 banks
33 * for chip select 0 and 1
37 * DDR Memory Control Registers
40 struct panthddr_map_registers {
41 u32 cs; /* Memory Address Map Register -CS */
45 struct panthddr_registers {
46 u8 pad[0x100 - 0x000];
47 struct panthddr_map_registers mmap[2];
51 * panth_sdram_base - reads SDRAM Base Address Register
53 u32 panth_sdram_base(int chip_sel)
55 struct panthddr_registers *ddr_regs =
56 (struct panthddr_registers *)PANTHEON_DRAM_BASE;
58 u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
63 result = readl(&ddr_regs->mmap[chip_sel].cs) & 0xFF800000;
68 * panth_sdram_size - reads SDRAM size
70 u32 panth_sdram_size(int chip_sel)
72 struct panthddr_registers *ddr_regs =
73 (struct panthddr_registers *)PANTHEON_DRAM_BASE;
75 u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
80 result = readl(&ddr_regs->mmap[chip_sel].cs);
81 result = (result >> 16) & 0xF;
83 printf("Unknown DRAM Size\n");
86 return ((0x8 << (result - 0x7)) * 1024 * 1024);
90 #ifndef CONFIG_SYS_BOARD_DRAM_INIT
96 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
97 gd->bd->bi_dram[i].start = panth_sdram_base(i);
98 gd->bd->bi_dram[i].size = panth_sdram_size(i);
100 * It is assumed that all memory banks are consecutive
102 * If the gap is found, ram_size will be reported for
103 * consecutive memory only
105 if (gd->bd->bi_dram[i].start != gd->ram_size)
108 gd->ram_size += gd->bd->bi_dram[i].size;
112 for (; i < CONFIG_NR_DRAM_BANKS; i++) {
114 * If above loop terminated prematurely, we need to set
115 * remaining banks' start address & size as 0. Otherwise other
116 * u-boot functions and Linux kernel gets wrong values which
117 * could result in crash
119 gd->bd->bi_dram[i].start = 0;
120 gd->bd->bi_dram[i].size = 0;
126 * If this function is not defined here,
127 * board.c alters dram bank zero configuration defined above.
129 void dram_init_banksize(void)
133 #endif /* CONFIG_SYS_BOARD_DRAM_INIT */