3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Lei Wen <leiwen@marvell.com>,
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
26 #include <asm/arch/pantheon.h>
28 DECLARE_GLOBAL_DATA_PTR;
31 * Pantheon DRAM controller supports upto 8 banks
32 * for chip select 0 and 1
36 * DDR Memory Control Registers
39 struct panthddr_map_registers {
40 u32 cs; /* Memory Address Map Register -CS */
44 struct panthddr_registers {
45 u8 pad[0x100 - 0x000];
46 struct panthddr_map_registers mmap[2];
50 * panth_sdram_base - reads SDRAM Base Address Register
52 u32 panth_sdram_base(int chip_sel)
54 struct panthddr_registers *ddr_regs =
55 (struct panthddr_registers *)PANTHEON_DRAM_BASE;
57 u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
62 result = readl(&ddr_regs->mmap[chip_sel].cs) & 0xFF800000;
67 * panth_sdram_size - reads SDRAM size
69 u32 panth_sdram_size(int chip_sel)
71 struct panthddr_registers *ddr_regs =
72 (struct panthddr_registers *)PANTHEON_DRAM_BASE;
74 u32 CS_valid = 0x01 & readl(&ddr_regs->mmap[chip_sel].cs);
79 result = readl(&ddr_regs->mmap[chip_sel].cs);
80 result = (result >> 16) & 0xF;
82 printf("Unknown DRAM Size\n");
85 return ((0x8 << (result - 0x7)) * 1024 * 1024);
89 #ifndef CONFIG_SYS_BOARD_DRAM_INIT
95 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
96 gd->bd->bi_dram[i].start = panth_sdram_base(i);
97 gd->bd->bi_dram[i].size = panth_sdram_size(i);
99 * It is assumed that all memory banks are consecutive
101 * If the gap is found, ram_size will be reported for
102 * consecutive memory only
104 if (gd->bd->bi_dram[i].start != gd->ram_size)
107 gd->ram_size += gd->bd->bi_dram[i].size;
111 for (; i < CONFIG_NR_DRAM_BANKS; i++) {
113 * If above loop terminated prematurely, we need to set
114 * remaining banks' start address & size as 0. Otherwise other
115 * u-boot functions and Linux kernel gets wrong values which
116 * could result in crash
118 gd->bd->bi_dram[i].start = 0;
119 gd->bd->bi_dram[i].size = 0;
125 * If this function is not defined here,
126 * board.c alters dram bank zero configuration defined above.
128 void dram_init_banksize(void)
132 #endif /* CONFIG_SYS_BOARD_DRAM_INIT */