1 // SPDX-License-Identifier: GPL-2.0+
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5 * Marius Groeger <mgroeger@sysgo.de>
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Alex Zuepke <azu@sysgo.de>
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
23 #include <asm/arch/imx-regs.h>
24 #include <asm/ptrace.h>
26 /* General purpose timers bitfields */
27 #define GPTCR_SWR (1 << 15) /* Software reset */
28 #define GPTCR_FRR (1 << 8) /* Freerun / restart */
29 #define GPTCR_CLKSOURCE_32 (4 << 1) /* Clock source */
30 #define GPTCR_TEN 1 /* Timer enable */
32 DECLARE_GLOBAL_DATA_PTR;
34 #define timestamp (gd->arch.tbl)
35 #define lastinc (gd->arch.lastinc)
38 * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
39 * "tick" is internal timer period
41 #ifdef CONFIG_MX27_TIMER_HIGH_PRECISION
42 /* ~0.4% error - measured with stop-watch on 100s boot-delay */
43 static inline unsigned long long tick_to_time(unsigned long long tick)
45 tick *= CONFIG_SYS_HZ;
46 do_div(tick, CONFIG_MX27_CLK32);
50 static inline unsigned long long time_to_tick(unsigned long long time)
52 time *= CONFIG_MX27_CLK32;
53 do_div(time, CONFIG_SYS_HZ);
57 static inline unsigned long long us_to_tick(unsigned long long us)
59 us = us * CONFIG_MX27_CLK32 + 999999;
65 #define TICK_PER_TIME ((CONFIG_MX27_CLK32 + CONFIG_SYS_HZ / 2) / \
67 #define US_PER_TICK (1000000 / CONFIG_MX27_CLK32)
69 static inline unsigned long long tick_to_time(unsigned long long tick)
71 do_div(tick, TICK_PER_TIME);
75 static inline unsigned long long time_to_tick(unsigned long long time)
77 return time * TICK_PER_TIME;
80 static inline unsigned long long us_to_tick(unsigned long long us)
82 us += US_PER_TICK - 1;
83 do_div(us, US_PER_TICK);
88 /* nothing really to do with interrupts, just starts up a counter. */
89 /* The 32768Hz 32-bit timer overruns in 131072 seconds */
93 struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
94 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
96 /* setup GP Timer 1 */
97 writel(GPTCR_SWR, ®s->gpt_tctl);
99 writel(readl(&pll->pccr0) | PCCR0_GPT1_EN, &pll->pccr0);
100 writel(readl(&pll->pccr1) | PCCR1_PERCLK1_EN, &pll->pccr1);
102 for (i = 0; i < 100; i++)
103 writel(0, ®s->gpt_tctl); /* We have no udelay by now */
104 writel(0, ®s->gpt_tprer); /* 32Khz */
105 /* Freerun Mode, PERCLK1 input */
106 writel(readl(®s->gpt_tctl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
108 writel(readl(®s->gpt_tctl) | GPTCR_TEN, ®s->gpt_tctl);
113 unsigned long long get_ticks(void)
115 struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
116 ulong now = readl(®s->gpt_tcn); /* current tick value */
118 if (now >= lastinc) {
120 * normal mode (non roll)
121 * move stamp forward with absolut diff ticks
123 timestamp += (now - lastinc);
125 /* we have rollover of incrementer */
126 timestamp += (0xFFFFFFFF - lastinc) + now;
132 static ulong get_timer_masked(void)
135 * get_ticks() returns a long long (64 bit), it wraps in
136 * 2^64 / CONFIG_MX27_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
137 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
138 * 5 * 10^6 days - long enough.
140 return tick_to_time(get_ticks());
143 ulong get_timer(ulong base)
145 return get_timer_masked() - base;
148 /* delay x useconds AND preserve advance timstamp value */
149 void __udelay(unsigned long usec)
151 unsigned long long tmp;
154 tmo = us_to_tick(usec);
155 tmp = get_ticks() + tmo; /* get current timestamp */
157 while (get_ticks() < tmp) /* loop till event */
161 ulong get_tbclk(void)
163 return CONFIG_MX27_CLK32;