1 // SPDX-License-Identifier: GPL-2.0+
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
5 * Marius Groeger <mgroeger@sysgo.de>
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Alex Zuepke <azu@sysgo.de>
12 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 * Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
21 #include <asm/arch/imx-regs.h>
23 /* General purpose timers bitfields */
24 #define GPTCR_SWR (1 << 15) /* Software reset */
25 #define GPTCR_FRR (1 << 8) /* Freerun / restart */
26 #define GPTCR_CLKSOURCE_32 (4 << 1) /* Clock source */
27 #define GPTCR_TEN 1 /* Timer enable */
29 DECLARE_GLOBAL_DATA_PTR;
31 #define timestamp (gd->arch.tbl)
32 #define lastinc (gd->arch.lastinc)
35 * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
36 * "tick" is internal timer period
38 #ifdef CONFIG_MX27_TIMER_HIGH_PRECISION
39 /* ~0.4% error - measured with stop-watch on 100s boot-delay */
40 static inline unsigned long long tick_to_time(unsigned long long tick)
42 tick *= CONFIG_SYS_HZ;
43 do_div(tick, CONFIG_MX27_CLK32);
47 static inline unsigned long long time_to_tick(unsigned long long time)
49 time *= CONFIG_MX27_CLK32;
50 do_div(time, CONFIG_SYS_HZ);
54 static inline unsigned long long us_to_tick(unsigned long long us)
56 us = us * CONFIG_MX27_CLK32 + 999999;
62 #define TICK_PER_TIME ((CONFIG_MX27_CLK32 + CONFIG_SYS_HZ / 2) / \
64 #define US_PER_TICK (1000000 / CONFIG_MX27_CLK32)
66 static inline unsigned long long tick_to_time(unsigned long long tick)
68 do_div(tick, TICK_PER_TIME);
72 static inline unsigned long long time_to_tick(unsigned long long time)
74 return time * TICK_PER_TIME;
77 static inline unsigned long long us_to_tick(unsigned long long us)
79 us += US_PER_TICK - 1;
80 do_div(us, US_PER_TICK);
85 /* nothing really to do with interrupts, just starts up a counter. */
86 /* The 32768Hz 32-bit timer overruns in 131072 seconds */
90 struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
91 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
93 /* setup GP Timer 1 */
94 writel(GPTCR_SWR, ®s->gpt_tctl);
96 writel(readl(&pll->pccr0) | PCCR0_GPT1_EN, &pll->pccr0);
97 writel(readl(&pll->pccr1) | PCCR1_PERCLK1_EN, &pll->pccr1);
99 for (i = 0; i < 100; i++)
100 writel(0, ®s->gpt_tctl); /* We have no udelay by now */
101 writel(0, ®s->gpt_tprer); /* 32Khz */
102 /* Freerun Mode, PERCLK1 input */
103 writel(readl(®s->gpt_tctl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
105 writel(readl(®s->gpt_tctl) | GPTCR_TEN, ®s->gpt_tctl);
110 unsigned long long get_ticks(void)
112 struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
113 ulong now = readl(®s->gpt_tcn); /* current tick value */
115 if (now >= lastinc) {
117 * normal mode (non roll)
118 * move stamp forward with absolut diff ticks
120 timestamp += (now - lastinc);
122 /* we have rollover of incrementer */
123 timestamp += (0xFFFFFFFF - lastinc) + now;
129 ulong get_timer_masked(void)
132 * get_ticks() returns a long long (64 bit), it wraps in
133 * 2^64 / CONFIG_MX27_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
134 * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
135 * 5 * 10^6 days - long enough.
137 return tick_to_time(get_ticks());
140 ulong get_timer(ulong base)
142 return get_timer_masked() - base;
145 /* delay x useconds AND preserve advance timstamp value */
146 void __udelay(unsigned long usec)
148 unsigned long long tmp;
151 tmo = us_to_tick(usec);
152 tmp = get_ticks() + tmo; /* get current timestamp */
154 while (get_ticks() < tmp) /* loop till event */
158 ulong get_tbclk(void)
160 return CONFIG_MX27_CLK32;