2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * Based on mx27/generic.c:
6 * Copyright (c) 2008 Eric Jarrige <eric.jarrige@armadeus.org>
7 * Copyright (c) 2009 Ilya Yanok <yanok@emcraft.com>
9 * SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch-imx/cpu.h>
17 #include <asm/arch/imx-regs.h>
18 #include <asm/arch/clock.h>
20 #ifdef CONFIG_FSL_ESDHC
21 #include <fsl_esdhc.h>
23 DECLARE_GLOBAL_DATA_PTR;
27 * get the system pll clock in Hz
29 * mfi + mfn / (mfd +1)
30 * f = 2 * f_ref * --------------------
33 static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
35 unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT)
37 int mfn = (pll >> CCM_PLL_MFN_SHIFT)
39 unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT)
41 unsigned int pd = (pll >> CCM_PLL_PD_SHIFT)
44 mfi = mfi <= 5 ? 5 : mfi;
45 mfn = mfn >= 512 ? mfn - 1024 : mfn;
49 return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn),
53 static ulong imx_get_mpllclk(void)
55 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
56 ulong fref = MXC_HCLK;
58 return imx_decode_pll(readl(&ccm->mpctl), fref);
61 static ulong imx_get_armclk(void)
63 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
64 ulong cctl = readl(&ccm->cctl);
65 ulong fref = imx_get_mpllclk();
68 if (cctl & CCM_CCTL_ARM_SRC)
69 fref = lldiv((u64) fref * 3, 4);
71 div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT)
72 & CCM_CCTL_ARM_DIV_MASK) + 1;
77 static ulong imx_get_ahbclk(void)
79 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
80 ulong cctl = readl(&ccm->cctl);
81 ulong fref = imx_get_armclk();
84 div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT)
85 & CCM_CCTL_AHB_DIV_MASK) + 1;
90 static ulong imx_get_ipgclk(void)
92 return imx_get_ahbclk() / 2;
95 static ulong imx_get_perclk(int clk)
97 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
98 ulong fref = imx_get_ahbclk();
101 div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]);
102 div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1;
107 unsigned int mxc_get_clock(enum mxc_clock clk)
109 if (clk >= MXC_CLK_NUM)
113 return imx_get_armclk();
115 return imx_get_ahbclk();
119 return imx_get_ipgclk();
121 return imx_get_perclk(clk);
125 u32 get_cpu_rev(void)
128 u32 system_rev = 0x25000;
130 /* read SREV register from IIM module */
131 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
132 srev = readl(&iim->iim_srev);
136 system_rev |= CHIP_REV_1_0;
139 system_rev |= CHIP_REV_1_1;
142 system_rev |= CHIP_REV_1_2;
145 system_rev |= 0x8000;
152 #if defined(CONFIG_DISPLAY_CPUINFO)
153 static char *get_reset_cause(void)
155 /* read RCSR register from CCM module */
156 struct ccm_regs *ccm =
157 (struct ccm_regs *)IMX_CCM_BASE;
159 u32 cause = readl(&ccm->rcsr) & 0x0f;
165 else if ((cause & 2) == 2)
167 else if ((cause & 4) == 4)
169 else if ((cause & 8) == 8)
172 return "unknown reset";
176 int print_cpuinfo(void)
179 u32 cpurev = get_cpu_rev();
181 printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n",
182 (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
183 ((cpurev & 0x8000) ? " unknown" : ""),
184 strmhz(buf, imx_get_armclk()));
185 printf("Reset cause: %s\n", get_reset_cause());
190 void enable_caches(void)
192 #ifndef CONFIG_SYS_DCACHE_OFF
193 /* Enable D-cache. I-cache is already enabled in start.S */
198 #if defined(CONFIG_FEC_MXC)
200 * Initializes on-chip ethernet controllers.
201 * to override, implement board_eth_init()
203 int cpu_eth_init(bd_t *bis)
205 struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
208 val = readl(&ccm->cgr0);
210 writel(val, &ccm->cgr0);
211 return fecmxc_initialize(bis);
217 #ifdef CONFIG_FSL_ESDHC
218 #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
219 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
221 gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
227 #ifdef CONFIG_FSL_ESDHC
229 * Initializes on-chip MMC controllers.
230 * to override, implement board_mmc_init()
232 int cpu_mmc_init(bd_t *bis)
234 return fsl_esdhc_mmc_init(bis);
238 #ifdef CONFIG_FEC_MXC
239 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
242 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
243 struct fuse_bank *bank = &iim->bank[0];
244 struct fuse_bank0_regs *fuse =
245 (struct fuse_bank0_regs *)bank->fuse_regs;
247 for (i = 0; i < 6; i++)
248 mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
250 #endif /* CONFIG_FEC_MXC */