3 * Texas Instruments <www.ti.com>
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
19 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
21 * See file CREDITS for list of people who contributed to this
24 * This program is free software; you can redistribute it and/or
25 * modify it under the terms of the GNU General Public License as
26 * published by the Free Software Foundation; either version 2 of
27 * the License, or (at your option) any later version.
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42 #include <asm/arch/timer_defs.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 static struct davinci_timer * const timer =
47 (struct davinci_timer *)CONFIG_SYS_TIMERBASE;
49 #define TIMER_LOAD_VAL 0xffffffff
51 #define TIM_CLK_DIV 16
55 /* We are using timer34 in unchained 32-bit mode, full speed */
56 writel(0x0, &timer->tcr);
57 writel(0x0, &timer->tgcr);
58 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
59 writel(0x0, &timer->tim34);
60 writel(TIMER_LOAD_VAL, &timer->prd34);
61 writel(2 << 22, &timer->tcr);
62 gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
63 gd->timer_reset_value = 0;
69 * Get the current 64 bit timer tick count
71 unsigned long long get_ticks(void)
73 unsigned long now = readl(&timer->tim34);
75 /* increment tbu if tbl has rolled over */
80 return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
83 ulong get_timer(ulong base)
85 unsigned long long timer_diff;
87 timer_diff = get_ticks() - gd->timer_reset_value;
89 return (timer_diff / (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
92 void __udelay(unsigned long usec)
94 unsigned long long endtime;
96 endtime = ((unsigned long long)usec * gd->timer_rate_hz) / 1000000UL;
97 endtime += get_ticks();
99 while (get_ticks() < endtime)
104 * This function is derived from PowerPC code (timebase clock frequency).
105 * On ARM it returns the number of timer ticks per second.
107 ulong get_tbclk(void)
109 return CONFIG_SYS_HZ;
112 #ifdef CONFIG_HW_WATCHDOG
113 static struct davinci_timer * const wdttimer =
114 (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
117 * See prufw2.pdf for using Timer as a WDT
119 void davinci_hw_watchdog_enable(void)
121 writel(0x0, &wdttimer->tcr);
122 writel(0x0, &wdttimer->tgcr);
124 writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
125 writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
126 writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
127 writel(2 << 22, &wdttimer->tcr);
128 writel(0x0, &wdttimer->tim12);
129 writel(0x0, &wdttimer->tim34);
130 /* set WDEN bit, WDKEY 0xa5c6 */
131 writel(0xa5c64000, &wdttimer->wdtcr);
132 /* clear counter register */
133 writel(0xda7e4000, &wdttimer->wdtcr);
136 void davinci_hw_watchdog_reset(void)
138 writel(0xa5c64000, &wdttimer->wdtcr);
139 writel(0xda7e4000, &wdttimer->wdtcr);