2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * (C) Copyright 2009-2011
7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8 * esd electronic system design gmbh <www.esd.eu>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/hardware.h>
32 #include <asm/arch/at91_common.h>
33 #include <asm/arch/at91_pmc.h>
34 #include <asm/arch/at91_pio.h>
36 void at91_serial0_hw_init(void)
38 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
40 at91_set_a_periph(AT91_PIO_PORTA, 26, 1); /* TXD0 */
41 at91_set_a_periph(AT91_PIO_PORTA, 27, 0); /* RXD0 */
42 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
45 void at91_serial1_hw_init(void)
47 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
49 at91_set_a_periph(AT91_PIO_PORTD, 0, 1); /* TXD1 */
50 at91_set_a_periph(AT91_PIO_PORTD, 1, 0); /* RXD1 */
51 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
54 void at91_serial2_hw_init(void)
56 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
58 at91_set_a_periph(AT91_PIO_PORTD, 2, 1); /* TXD2 */
59 at91_set_a_periph(AT91_PIO_PORTD, 3, 0); /* RXD2 */
60 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
63 void at91_seriald_hw_init(void)
65 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
67 at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* DRXD */
68 at91_set_a_periph(AT91_PIO_PORTC, 31, 1); /* DTXD */
69 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
72 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
73 void at91_spi0_hw_init(unsigned long cs_mask)
75 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
77 at91_set_b_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
78 at91_set_b_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
79 at91_set_b_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
82 writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
84 if (cs_mask & (1 << 0)) {
85 at91_set_b_periph(AT91_PIO_PORTA, 5, 1);
87 if (cs_mask & (1 << 1)) {
88 at91_set_b_periph(AT91_PIO_PORTA, 3, 1);
90 if (cs_mask & (1 << 2)) {
91 at91_set_b_periph(AT91_PIO_PORTA, 4, 1);
93 if (cs_mask & (1 << 3)) {
94 at91_set_b_periph(AT91_PIO_PORTB, 11, 1);
96 if (cs_mask & (1 << 4)) {
97 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
99 if (cs_mask & (1 << 5)) {
100 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
102 if (cs_mask & (1 << 6)) {
103 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
105 if (cs_mask & (1 << 7)) {
106 at91_set_pio_output(AT91_PIO_PORTB, 11, 1);
110 void at91_spi1_hw_init(unsigned long cs_mask)
112 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
114 at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* SPI1_MISO */
115 at91_set_a_periph(AT91_PIO_PORTB, 13, 0); /* SPI1_MOSI */
116 at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* SPI1_SPCK */
119 writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
121 if (cs_mask & (1 << 0)) {
122 at91_set_a_periph(AT91_PIO_PORTB, 15, 1);
124 if (cs_mask & (1 << 1)) {
125 at91_set_a_periph(AT91_PIO_PORTB, 16, 1);
127 if (cs_mask & (1 << 2)) {
128 at91_set_a_periph(AT91_PIO_PORTB, 17, 1);
130 if (cs_mask & (1 << 3)) {
131 at91_set_a_periph(AT91_PIO_PORTB, 18, 1);
133 if (cs_mask & (1 << 4)) {
134 at91_set_pio_output(AT91_PIO_PORTB, 15, 1);
136 if (cs_mask & (1 << 5)) {
137 at91_set_pio_output(AT91_PIO_PORTB, 16, 1);
139 if (cs_mask & (1 << 6)) {
140 at91_set_pio_output(AT91_PIO_PORTB, 17, 1);
142 if (cs_mask & (1 << 7)) {
143 at91_set_pio_output(AT91_PIO_PORTB, 18, 1);
149 void at91_macb_hw_init(void)
151 at91_set_a_periph(AT91_PIO_PORTE, 21, 0); /* ETXCK_EREFCK */
152 at91_set_b_periph(AT91_PIO_PORTC, 25, 0); /* ERXDV */
153 at91_set_a_periph(AT91_PIO_PORTE, 25, 0); /* ERX0 */
154 at91_set_a_periph(AT91_PIO_PORTE, 26, 0); /* ERX1 */
155 at91_set_a_periph(AT91_PIO_PORTE, 27, 0); /* ERXER */
156 at91_set_a_periph(AT91_PIO_PORTE, 28, 0); /* ETXEN */
157 at91_set_a_periph(AT91_PIO_PORTE, 23, 0); /* ETX0 */
158 at91_set_a_periph(AT91_PIO_PORTE, 24, 0); /* ETX1 */
159 at91_set_a_periph(AT91_PIO_PORTE, 30, 0); /* EMDIO */
160 at91_set_a_periph(AT91_PIO_PORTE, 29, 0); /* EMDC */
163 at91_set_a_periph(AT91_PIO_PORTE, 22, 0); /* ECRS */
164 at91_set_b_periph(AT91_PIO_PORTC, 26, 0); /* ECOL */
165 at91_set_b_periph(AT91_PIO_PORTC, 22, 0); /* ERX2 */
166 at91_set_b_periph(AT91_PIO_PORTC, 23, 0); /* ERX3 */
167 at91_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ERXCK */
168 at91_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ETX2 */
169 at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ETX3 */
170 at91_set_b_periph(AT91_PIO_PORTC, 24, 0); /* ETXER */
175 #ifdef CONFIG_USB_OHCI_NEW
176 void at91_uhp_hw_init(void)
178 /* Enable VBus on UHP ports */
179 at91_set_pio_output(AT91_PIO_PORTA, 21, 0);
180 at91_set_pio_output(AT91_PIO_PORTA, 24, 0);
184 #ifdef CONFIG_AT91_CAN
185 void at91_can_hw_init(void)
187 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
189 at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CAN_TX */
190 at91_set_a_periph(AT91_PIO_PORTA, 14, 1); /* CAN_RX */
193 writel(1 << ATMEL_ID_CAN, &pmc->pcer);