2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/arch/at91_common.h>
28 #include <asm/arch/at91_pmc.h>
29 #include <asm/arch/gpio.h>
32 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
33 * peripheral pins. Good to have if hardware is soldered optionally
34 * or in case of SPI no slave is selected. Avoid lines to float
35 * needlessly. Use a short local PUP define.
37 * Due to errata "TXD floats when CTS is inactive" pullups are always
40 #ifdef CONFIG_AT91_GPIO_PULLUP
41 # define PUP CONFIG_AT91_GPIO_PULLUP
46 void at91_serial0_hw_init(void)
48 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
50 at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */
51 at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD0 */
52 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
55 void at91_serial1_hw_init(void)
57 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
59 at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */
60 at91_set_a_periph(AT91_PIO_PORTB, 7, PUP); /* RXD1 */
61 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
64 void at91_serial2_hw_init(void)
66 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
68 at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */
69 at91_set_a_periph(AT91_PIO_PORTB, 9, PUP); /* RXD2 */
70 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
73 void at91_seriald_hw_init(void)
75 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
77 at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* DRXD */
78 at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */
79 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
82 #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
83 void at91_spi0_hw_init(unsigned long cs_mask)
85 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
87 at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
88 at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
89 at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
92 writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
94 if (cs_mask & (1 << 0)) {
95 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
97 if (cs_mask & (1 << 1)) {
98 at91_set_b_periph(AT91_PIO_PORTC, 11, 1);
100 if (cs_mask & (1 << 2)) {
101 at91_set_b_periph(AT91_PIO_PORTC, 16, 1);
103 if (cs_mask & (1 << 3)) {
104 at91_set_b_periph(AT91_PIO_PORTC, 17, 1);
106 if (cs_mask & (1 << 4)) {
107 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
109 if (cs_mask & (1 << 5)) {
110 at91_set_pio_output(AT91_PIO_PORTC, 11, 1);
112 if (cs_mask & (1 << 6)) {
113 at91_set_pio_output(AT91_PIO_PORTC, 16, 1);
115 if (cs_mask & (1 << 7)) {
116 at91_set_pio_output(AT91_PIO_PORTC, 17, 1);
120 void at91_spi1_hw_init(unsigned long cs_mask)
122 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
124 at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI1_MISO */
125 at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI1_MOSI */
126 at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI1_SPCK */
129 writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
131 if (cs_mask & (1 << 0)) {
132 at91_set_a_periph(AT91_PIO_PORTB, 3, 1);
134 if (cs_mask & (1 << 1)) {
135 at91_set_b_periph(AT91_PIO_PORTC, 5, 1);
137 if (cs_mask & (1 << 2)) {
138 at91_set_b_periph(AT91_PIO_PORTC, 4, 1);
140 if (cs_mask & (1 << 3)) {
141 at91_set_b_periph(AT91_PIO_PORTC, 3, 1);
143 if (cs_mask & (1 << 4)) {
144 at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
146 if (cs_mask & (1 << 5)) {
147 at91_set_pio_output(AT91_PIO_PORTC, 5, 1);
149 if (cs_mask & (1 << 6)) {
150 at91_set_pio_output(AT91_PIO_PORTC, 4, 1);
152 if (cs_mask & (1 << 7)) {
153 at91_set_pio_output(AT91_PIO_PORTC, 3, 1);
159 void at91_macb_hw_init(void)
161 at91_set_a_periph(AT91_PIO_PORTA, 19, 0); /* ETXCK_EREFCK */
162 at91_set_a_periph(AT91_PIO_PORTA, 17, 0); /* ERXDV */
163 at91_set_a_periph(AT91_PIO_PORTA, 14, 0); /* ERX0 */
164 at91_set_a_periph(AT91_PIO_PORTA, 15, 0); /* ERX1 */
165 at91_set_a_periph(AT91_PIO_PORTA, 18, 0); /* ERXER */
166 at91_set_a_periph(AT91_PIO_PORTA, 16, 0); /* ETXEN */
167 at91_set_a_periph(AT91_PIO_PORTA, 12, 0); /* ETX0 */
168 at91_set_a_periph(AT91_PIO_PORTA, 13, 0); /* ETX1 */
169 at91_set_a_periph(AT91_PIO_PORTA, 21, 0); /* EMDIO */
170 at91_set_a_periph(AT91_PIO_PORTA, 20, 0); /* EMDC */
173 at91_set_b_periph(AT91_PIO_PORTA, 28, 0); /* ECRS */
174 at91_set_b_periph(AT91_PIO_PORTA, 29, 0); /* ECOL */
175 at91_set_b_periph(AT91_PIO_PORTA, 25, 0); /* ERX2 */
176 at91_set_b_periph(AT91_PIO_PORTA, 26, 0); /* ERX3 */
177 at91_set_b_periph(AT91_PIO_PORTA, 27, 0); /* ERXCK */
178 #if defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AFEB9260)
180 * use PA10, PA11 for ETX2, ETX3.
181 * PA23 and PA24 are for TWI EEPROM
183 at91_set_b_periph(AT91_PIO_PORTA, 10, 0); /* ETX2 */
184 at91_set_b_periph(AT91_PIO_PORTA, 11, 0); /* ETX3 */
186 at91_set_b_periph(AT91_PIO_PORTA, 23, 0); /* ETX2 */
187 at91_set_b_periph(AT91_PIO_PORTA, 24, 0); /* ETX3 */
188 #if defined(CONFIG_AT91SAM9G20)
189 /* 9G20 BOOT ROM initializes those pins to multi-drive, undo that */
190 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 0);
191 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 0);
194 at91_set_b_periph(AT91_PIO_PORTA, 22, 0); /* ETXER */
199 #if defined(CONFIG_ATMEL_MCI) || defined(CONFIG_GENERIC_ATMEL_MCI)
200 void at91_mci_hw_init(void)
202 at91_set_a_periph(AT91_PIO_PORTA, 8, 1); /* MCCK */
203 #if defined(CONFIG_ATMEL_MCI_PORTB)
204 at91_set_b_periph(AT91_PIO_PORTA, 1, 1); /* MCCDB */
205 at91_set_b_periph(AT91_PIO_PORTA, 0, 1); /* MCDB0 */
206 at91_set_b_periph(AT91_PIO_PORTA, 5, 1); /* MCDB1 */
207 at91_set_b_periph(AT91_PIO_PORTA, 4, 1); /* MCDB2 */
208 at91_set_b_periph(AT91_PIO_PORTA, 3, 1); /* MCDB3 */
210 at91_set_a_periph(AT91_PIO_PORTA, 7, 1); /* MCCDA */
211 at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* MCDA0 */
212 at91_set_a_periph(AT91_PIO_PORTA, 9, 1); /* MCDA1 */
213 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* MCDA2 */
214 at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* MCDA3 */