2 * armboot - Startup Code for ARM1176 CPU-core
4 * Copyright (c) 2007 Samsung Electronics
7 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
28 * 2007-09-21 - Added MoviNAND and OneNAND boot codes by
29 * jsgood (jsgood.yang@samsung.com)
30 * Base codes by scsuh (sc.suh)
35 #ifdef CONFIG_ENABLE_MMU
36 #include <asm/proc/domain.h>
39 #if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
40 #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
44 *************************************************************************
46 * Jump vector table as in table 3.1 in [1]
48 *************************************************************************
53 #ifndef CONFIG_NAND_SPL
54 ldr pc, _undefined_instruction
55 ldr pc, _software_interrupt
56 ldr pc, _prefetch_abort
62 _undefined_instruction:
63 .word undefined_instruction
65 .word software_interrupt
77 .word 0x12345678 /* now 16*4=64 */
84 .balignl 16,0xdeadbeef
86 *************************************************************************
88 * Startup Code (reset vector)
90 * do important init only if we don't start from memory!
91 * setup Memory and board specific bits prior to relocation.
92 * relocate armboot to ram
95 *************************************************************************
102 * Below variable is very important because we use MMU in U-Boot.
103 * Without it, we cannot run code correctly before MMU is ON.
107 .word CONFIG_SYS_PHY_UBOOT_BASE
109 .globl _armboot_start
114 * These are defined in the board-specific linker script.
125 * the actual reset code
130 * set the cpu to SVC32 mode
138 *************************************************************************
140 * CPU_init_critical registers
142 * setup important registers
143 * setup memory timing
145 *************************************************************************
148 * we do sys-critical inits only at reboot,
149 * not when booting from ram!
153 * When booting from NAND - it has definitely been a reset, so, no need
154 * to flush caches and disable the MMU
156 #ifndef CONFIG_NAND_SPL
158 * flush v4 I/D caches
161 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
162 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
165 * disable MMU stuff and caches
167 mrc p15, 0, r0, c1, c0, 0
168 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
169 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
170 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
171 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
173 /* Prepare to disable the MMU */
174 adr r2, mmu_disable_phys
175 sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE)
179 /* Run in a single cache-line */
181 mcr p15, 0, r0, c1, c0, 0
187 #ifdef CONFIG_DISABLE_TCM
191 mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
197 mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
199 mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
204 #ifdef CONFIG_PERIPORT_REMAP
205 /* Peri port setup */
206 ldr r0, =CONFIG_PERIPORT_BASE
207 orr r0, r0, #CONFIG_PERIPORT_SIZE
208 mcr p15,0,r0,c15,c2,4
212 * Go setup Memory and board specific bits prior to relocation.
214 bl lowlevel_init /* go setup pll,mux,memory */
216 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
217 relocate: /* relocate U-Boot to RAM */
218 adr r0, _start /* r0 <- current position of code */
219 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
220 cmp r0, r1 /* don't reloc during debug */
223 ldr r2, _armboot_start
225 sub r2, r3, r2 /* r2 <- size of armboot */
226 add r2, r0, r2 /* r2 <- source end address */
229 ldmia r0!, {r3-r10} /* copy from source address [r0] */
230 stmia r1!, {r3-r10} /* copy to target address [r1] */
231 cmp r0, r2 /* until source end addreee [r2] */
233 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
235 #ifdef CONFIG_ENABLE_MMU
237 /* enable domain access */
239 mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
241 /* Set the TTB register */
242 ldr r0, _mmu_table_base
243 ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
247 mcr p15, 0, r1, c2, c0, 0
250 mrc p15, 0, r0, c1, c0, 0
251 orr r0, r0, #1 /* Set CR_M to enable MMU */
253 /* Prepare to enable the MMU */
263 /* Run in a single cache-line */
266 mcr p15, 0, r0, c1, c0, 0
273 /* Set up the stack */
275 ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */
276 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
277 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
278 sub sp, r0, #12 /* leave 3 words for abort-stack */
279 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
282 ldr r0, _bss_start /* find start of bss segment */
283 ldr r1, _bss_end /* stop here */
284 mov r2, #0 /* clear */
287 str r2, [r0] /* clear loop... */
292 #ifndef CONFIG_NAND_SPL
293 ldr pc, _start_armboot
302 #ifdef CONFIG_ENABLE_MMU
307 #ifndef CONFIG_NAND_SPL
309 * we assume that cache operation is done before. (eg. cleanup_before_linux())
310 * actually, we don't need to do anything about cache if not use d-cache in
311 * U-Boot. So, in this function we clean only MMU. by scsuh
313 * void theLastJump(void *kernel, int arch_num, uint boot_params);
315 #ifdef CONFIG_ENABLE_MMU
320 ldr r4, _TEXT_PHY_BASE
321 adr r5, phy_last_jump
329 mrc p15, 0, r0, c1, c0, 0
330 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
331 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
332 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
333 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
334 mcr p15, 0, r0, c1, c0, 0
336 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
344 *************************************************************************
348 *************************************************************************
353 #define S_FRAME_SIZE 72
375 #define MODE_SVC 0x13
379 * use bad_save_user_regs for abort/prefetch/undef/swi ...
382 .macro bad_save_user_regs
383 /* carve out a frame on current user stack */
384 sub sp, sp, #S_FRAME_SIZE
385 /* Save user registers (now in svc mode) r0-r12 */
388 ldr r2, _armboot_start
389 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
390 /* set base 2 words into abort stack */
391 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
392 /* get values for "aborted" pc and cpsr (into parm regs) */
394 /* grab pointer to old stack */
395 add r0, sp, #S_FRAME_SIZE
399 /* save sp_SVC, lr_SVC, pc, cpsr */
401 /* save current stack into r0 (param register) */
406 /* setup our mode stack (enter in banked mode) */
407 ldr r13, _armboot_start
408 /* move past malloc pool */
409 sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
410 /* move to reserved a couple spots for abort stack */
411 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
413 /* save caller lr in position 0 of saved stack */
417 /* save spsr in position 1 of saved stack */
420 /* prepare SVC-Mode */
423 /* switch modes, make sure moves will execute */
425 /* capture return pc */
427 /* jump to next instruction & switch modes. */
431 .macro get_bad_stack_swi
432 /* space on current stack for scratch reg. */
434 /* save R0's value. */
436 /* get data regions start */
437 ldr r0, _armboot_start
438 /* move past malloc pool */
439 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
440 /* move past gbl and a couple spots for abort stack */
441 sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
442 /* save caller lr in position 0 of saved stack */
446 /* save spsr in position 1 of saved stack */
450 /* pop stack entry */
458 undefined_instruction:
461 bl do_undefined_instruction
467 bl do_software_interrupt
498 #endif /* CONFIG_NAND_SPL */