2 * armboot - Startup Code for OMP2420/ARM1136 CPU-core
4 * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
6 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
7 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
8 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
9 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
10 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 #ifdef CONFIG_PRELOADER
52 .word 0x12345678 /* now 16*4=64 */
54 ldr pc, _undefined_instruction
55 ldr pc, _software_interrupt
56 ldr pc, _prefetch_abort
62 _undefined_instruction: .word undefined_instruction
63 _software_interrupt: .word software_interrupt
64 _prefetch_abort: .word prefetch_abort
65 _data_abort: .word data_abort
66 _not_used: .word not_used
69 _pad: .word 0x12345678 /* now 16*4=64 */
70 #endif /* CONFIG_PRELOADER */
74 .balignl 16,0xdeadbeef
76 *************************************************************************
78 * Startup Code (reset vector)
80 * do important init only if we don't start from memory!
81 * setup Memory and board specific bits prior to relocation.
82 * relocate armboot to ram
85 *************************************************************************
90 .word CONFIG_SYS_TEXT_BASE
93 * These are defined in the board-specific linker script.
94 * Subtracting _start from them lets the linker put their
95 * relative position in the executable instead of leaving
100 .word __bss_start - _start
106 .globl _datarel_start_ofs
108 .word __datarel_start - _start
110 .globl _datarelrolocal_start_ofs
111 _datarelrolocal_start_ofs:
112 .word __datarelrolocal_start - _start
114 .globl _datarellocal_start_ofs
115 _datarellocal_start_ofs:
116 .word __datarellocal_start - _start
118 .globl _datarelro_start_ofs
119 _datarelro_start_ofs:
120 .word __datarelro_start - _start
122 #ifdef CONFIG_USE_IRQ
123 /* IRQ stack memory (calculated at run-time) */
124 .globl IRQ_STACK_START
128 /* IRQ stack memory (calculated at run-time) */
129 .globl FIQ_STACK_START
134 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
135 /* IRQ stack memory (calculated at run-time) + 8 bytes */
136 .globl IRQ_STACK_START_IN
141 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
143 * the actual reset code
148 * set the cpu to SVC32 mode
155 #ifdef CONFIG_OMAP2420H4
156 /* Copy vectors to mask ROM indirect addr */
157 adr r0, _start /* r0 <- current position of code */
158 add r0, r0, #4 /* skip reset vector */
159 mov r2, #64 /* r2 <- size to copy */
160 add r2, r0, r2 /* r2 <- source end address */
161 mov r1, #SRAM_OFFSET0 /* build vect addr */
162 mov r3, #SRAM_OFFSET1
164 mov r3, #SRAM_OFFSET2
167 ldmia r0!, {r3-r10} /* copy from source address [r0] */
168 stmia r1!, {r3-r10} /* copy to target address [r1] */
169 cmp r0, r2 /* until source end address [r2] */
170 bne next /* loop until equal */
171 bl cpy_clk_code /* put dpll adjust code behind vectors */
173 /* the mask ROM code should have PLL and others stable */
174 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
178 /* Set stackpointer in internal RAM to call board_init_f */
180 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
183 #ifdef CONFIG_NAND_SPL
186 #ifdef CONFIG_ONENAND_IPL
190 #endif /* CONFIG_ONENAND_IPL */
191 #endif /* CONFIG_NAND_SPL */
193 /*------------------------------------------------------------------------------*/
196 * void relocate_code (addr_sp, gd, addr_moni)
198 * This "function" does not return, instead it continues in RAM
199 * after relocating the monitor code.
204 mov r4, r0 /* save addr_sp */
205 mov r5, r1 /* save addr of gd */
206 mov r6, r2 /* save addr of destination */
207 mov r7, r2 /* save addr of destination */
209 /* Set up the stack */
215 ldr r3, _bss_start_ofs
216 add r2, r0, r3 /* r2 <- source end address */
220 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
222 ldmia r0!, {r9-r10} /* copy from source address [r0] */
223 stmia r6!, {r9-r10} /* copy to target address [r1] */
224 cmp r0, r2 /* until source end address [r2] */
227 #ifndef CONFIG_PRELOADER
229 * fix .rel.dyn relocations
231 ldr r0, _TEXT_BASE /* r0 <- Text base */
232 sub r9, r7, r0 /* r9 <- relocation offset */
233 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
234 add r10, r10, r0 /* r10 <- sym table in FLASH */
235 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
236 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
237 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
238 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
240 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
241 add r0, r0, r9 /* r0 <- location to fix up in RAM */
244 cmp r8, #23 /* relative fixup? */
246 cmp r8, #2 /* absolute fixup? */
248 /* ignore unknown type of fixup */
251 /* absolute fix: set location to (offset) symbol value */
252 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
253 add r1, r10, r1 /* r1 <- address of symbol in table */
254 ldr r1, [r1, #4] /* r1 <- symbol value */
255 add r1, r9 /* r1 <- relocated sym addr */
258 /* relative fix: increase location by offset */
263 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
267 #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
270 #ifndef CONFIG_PRELOADER
271 ldr r0, _bss_start_ofs
273 ldr r3, _TEXT_BASE /* Text base */
274 mov r4, r7 /* reloc addr */
277 mov r2, #0x00000000 /* clear */
279 clbss_l:str r2, [r0] /* clear loop... */
283 #endif /* #ifndef CONFIG_PRELOADER */
286 * We are done. Do not return, instead branch to second part of board
287 * initialization, now running from RAM.
289 #ifdef CONFIG_NAND_SPL
290 ldr r0, _nand_boot_ofs
294 : .word nand_boot - _start
297 ldr r0, _board_init_r_ofs
301 /* setup parameters for board_init_r */
302 mov r0, r5 /* gd_t */
303 mov r1, r7 /* dest_addr */
308 .word board_init_r - _start
312 .word __rel_dyn_start - _start
314 .word __rel_dyn_end - _start
316 .word __dynsym_start - _start
318 #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
320 * the actual reset code
325 * set the cpu to SVC32 mode
332 #ifdef CONFIG_OMAP2420H4
333 /* Copy vectors to mask ROM indirect addr */
334 adr r0, _start /* r0 <- current position of code */
335 add r0, r0, #4 /* skip reset vector */
336 mov r2, #64 /* r2 <- size to copy */
337 add r2, r0, r2 /* r2 <- source end address */
338 mov r1, #SRAM_OFFSET0 /* build vect addr */
339 mov r3, #SRAM_OFFSET1
341 mov r3, #SRAM_OFFSET2
344 ldmia r0!, {r3-r10} /* copy from source address [r0] */
345 stmia r1!, {r3-r10} /* copy to target address [r1] */
346 cmp r0, r2 /* until source end address [r2] */
347 bne next /* loop until equal */
348 bl cpy_clk_code /* put dpll adjust code behind vectors */
350 /* the mask ROM code should have PLL and others stable */
351 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
355 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
356 relocate: /* relocate U-Boot to RAM */
357 adr r0, _start /* r0 <- current position of code */
358 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
359 cmp r0, r1 /* don't reloc during debug */
360 #ifndef CONFIG_PRELOADER
362 #endif /* CONFIG_PRELOADER */
364 ldr r2, _armboot_start
366 sub r2, r3, r2 /* r2 <- size of armboot */
367 add r2, r0, r2 /* r2 <- source end address */
370 ldmia r0!, {r3-r10} /* copy from source address [r0] */
371 stmia r1!, {r3-r10} /* copy to target address [r1] */
372 cmp r0, r2 /* until source end address [r2] */
374 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
376 /* Set up the stack */
378 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
379 #ifdef CONFIG_PRELOADER
380 sub sp, r0, #128 /* leave 32 words for abort-stack */
382 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
383 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
384 #ifdef CONFIG_USE_IRQ
385 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
387 sub sp, r0, #12 /* leave 3 words for abort-stack */
388 #endif /* CONFIG_PRELOADER */
389 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
393 ldr r0, _bss_start_ofs /* find start of bss segment */
395 ldr r1, _bss_end_ofs /* stop here */
397 mov r2, #0x00000000 /* clear */
399 #ifndef CONFIG_PRELOADER
400 clbss_l:str r2, [r0] /* clear loop... */
406 ldr r0, _start_armboot_ofs
412 #ifdef CONFIG_NAND_SPL
413 .word nand_boot - _start
415 #ifdef CONFIG_ONENAND_IPL
416 .word start_oneboot - _start
418 .word start_armboot - _start
419 #endif /* CONFIG_ONENAND_IPL */
420 #endif /* CONFIG_NAND_SPL */
422 #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
425 *************************************************************************
427 * CPU_init_critical registers
429 * setup important registers
430 * setup memory timing
432 *************************************************************************
434 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
437 * flush v4 I/D caches
440 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
441 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
444 * disable MMU stuff and caches
446 mrc p15, 0, r0, c1, c0, 0
447 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
448 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
449 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
450 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
451 mcr p15, 0, r0, c1, c0, 0
454 * Jump to board specific initialization... The Mask ROM will have already initialized
455 * basic memory. Go here to bump up clock rate and handle wake up conditions.
457 mov ip, lr /* persevere link reg across call */
458 bl lowlevel_init /* go setup pll,mux,memory */
459 mov lr, ip /* restore link */
460 mov pc, lr /* back to my caller */
461 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
463 #ifndef CONFIG_PRELOADER
465 *************************************************************************
469 *************************************************************************
474 #define S_FRAME_SIZE 72
496 #define MODE_SVC 0x13
500 * use bad_save_user_regs for abort/prefetch/undef/swi ...
501 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
504 .macro bad_save_user_regs
505 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
506 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
508 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
509 ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
512 sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
513 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
515 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
516 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
520 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
521 mov r0, sp @ save current stack into r0 (param register)
524 .macro irq_save_user_regs
525 sub sp, sp, #S_FRAME_SIZE
526 stmia sp, {r0 - r12} @ Calling r0-r12
527 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
528 stmdb r8, {sp, lr}^ @ Calling SP, LR
529 str lr, [r8, #0] @ Save calling PC
531 str r6, [r8, #4] @ Save CPSR
532 str r0, [r8, #8] @ Save OLD_R0
536 .macro irq_restore_user_regs
537 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
539 ldr lr, [sp, #S_PC] @ Get PC
540 add sp, sp, #S_FRAME_SIZE
541 subs pc, lr, #4 @ return & move spsr_svc into cpsr
545 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
546 ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
548 adr r13, _start @ setup our mode stack (enter in banked mode)
549 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
550 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
553 str lr, [r13] @ save caller lr in position 0 of saved stack
554 mrs lr, spsr @ get the spsr
555 str lr, [r13, #4] @ save spsr in position 1 of saved stack
557 mov r13, #MODE_SVC @ prepare SVC-Mode
559 msr spsr, r13 @ switch modes, make sure moves will execute
560 mov lr, pc @ capture return pc
561 movs pc, lr @ jump to next instruction & switch modes.
564 .macro get_bad_stack_swi
565 sub r13, r13, #4 @ space on current stack for scratch reg.
566 str r0, [r13] @ save R0's value.
567 #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
568 ldr r0, IRQ_STACK_START_IN @ get data regions start
570 ldr r0, _armboot_start @ get data regions start
571 sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
572 sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
574 str lr, [r0] @ save caller lr in position 0 of saved stack
575 mrs r0, spsr @ get the spsr
576 str lr, [r0, #4] @ save spsr in position 1 of saved stack
577 ldr r0, [r13] @ restore r0
578 add r13, r13, #4 @ pop stack entry
581 .macro get_irq_stack @ setup IRQ stack
582 ldr sp, IRQ_STACK_START
585 .macro get_fiq_stack @ setup FIQ stack
586 ldr sp, FIQ_STACK_START
588 #endif /* CONFIG_PRELOADER */
593 #ifdef CONFIG_PRELOADER
596 ldr sp, _TEXT_BASE /* use 32 words about stack */
597 bl hang /* hang and never return */
598 #else /* !CONFIG_PRELOADER */
600 undefined_instruction:
603 bl do_undefined_instruction
609 bl do_software_interrupt
629 #ifdef CONFIG_USE_IRQ
636 irq_restore_user_regs
641 /* someone ought to write a more effiction fiq_save_user_regs */
644 irq_restore_user_regs
662 .global arm1136_cache_flush
664 #if !defined(CONFIG_SYS_NO_ICACHE)
665 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
667 #if !defined(CONFIG_SYS_NO_DCACHE)
668 mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
670 mov pc, lr @ back to caller
671 #endif /* CONFIG_PRELOADER */