arch/arm/boot/dts/stm32mp157-pinctrl.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
   4  * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
   5  */
   6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
   7
   8 / {
   9         soc {
  10                 pinctrl: pin-controller@50002000 {
  11                         #address-cells = <1>;
  12                         #size-cells = <1>;
  13                         compatible = "st,stm32mp157-pinctrl";
  14                         ranges = <0 0x50002000 0xa400>;
  15                         interrupt-parent = <&exti>;
  16                         st,syscfg = <&exti 0x60 0xff>;
  17                         pins-are-numbered;
  18
  19                         gpioa: gpio@50002000 {
  20                                 gpio-controller;
  21                                 #gpio-cells = <2>;
  22                                 interrupt-controller;
  23                                 #interrupt-cells = <2>;
  24                                 reg = <0x0 0x400>;
  25                                 clocks = <&rcc GPIOA>;
  26                                 st,bank-name = "GPIOA";
  27                                 ngpios = <16>;
  28                                 gpio-ranges = <&pinctrl 0 0 16>;
  29                                 status = "disabled";
  30                         };
  31
  32                         gpiob: gpio@50003000 {
  33                                 gpio-controller;
  34                                 #gpio-cells = <2>;
  35                                 interrupt-controller;
  36                                 #interrupt-cells = <2>;
  37                                 reg = <0x1000 0x400>;
  38                                 clocks = <&rcc GPIOB>;
  39                                 st,bank-name = "GPIOB";
  40                                 ngpios = <16>;
  41                                 gpio-ranges = <&pinctrl 0 16 16>;
  42                                 status = "disabled";
  43                         };
  44
  45                         gpioc: gpio@50004000 {
  46                                 gpio-controller;
  47                                 #gpio-cells = <2>;
  48                                 interrupt-controller;
  49                                 #interrupt-cells = <2>;
  50                                 reg = <0x2000 0x400>;
  51                                 clocks = <&rcc GPIOC>;
  52                                 st,bank-name = "GPIOC";
  53                                 ngpios = <16>;
  54                                 gpio-ranges = <&pinctrl 0 32 16>;
  55                                 status = "disabled";
  56                         };
  57
  58                         gpiod: gpio@50005000 {
  59                                 gpio-controller;
  60                                 #gpio-cells = <2>;
  61                                 interrupt-controller;
  62                                 #interrupt-cells = <2>;
  63                                 reg = <0x3000 0x400>;
  64                                 clocks = <&rcc GPIOD>;
  65                                 st,bank-name = "GPIOD";
  66                                 ngpios = <16>;
  67                                 gpio-ranges = <&pinctrl 0 48 16>;
  68                                 status = "disabled";
  69                         };
  70
  71                         gpioe: gpio@50006000 {
  72                                 gpio-controller;
  73                                 #gpio-cells = <2>;
  74                                 interrupt-controller;
  75                                 #interrupt-cells = <2>;
  76                                 reg = <0x4000 0x400>;
  77                                 clocks = <&rcc GPIOE>;
  78                                 st,bank-name = "GPIOE";
  79                                 ngpios = <16>;
  80                                 gpio-ranges = <&pinctrl 0 64 16>;
  81                                 status = "disabled";
  82                         };
  83
  84                         gpiof: gpio@50007000 {
  85                                 gpio-controller;
  86                                 #gpio-cells = <2>;
  87                                 interrupt-controller;
  88                                 #interrupt-cells = <2>;
  89                                 reg = <0x5000 0x400>;
  90                                 clocks = <&rcc GPIOF>;
  91                                 st,bank-name = "GPIOF";
  92                                 ngpios = <16>;
  93                                 gpio-ranges = <&pinctrl 0 80 16>;
  94                                 status = "disabled";
  95                         };
  96
  97                         gpiog: gpio@50008000 {
  98                                 gpio-controller;
  99                                 #gpio-cells = <2>;
 100                                 interrupt-controller;
 101                                 #interrupt-cells = <2>;
 102                                 reg = <0x6000 0x400>;
 103                                 clocks = <&rcc GPIOG>;
 104                                 st,bank-name = "GPIOG";
 105                                 ngpios = <16>;
 106                                 gpio-ranges = <&pinctrl 0 96 16>;
 107                                 status = "disabled";
 108                         };
 109
 110                         gpioh: gpio@50009000 {
 111                                 gpio-controller;
 112                                 #gpio-cells = <2>;
 113                                 interrupt-controller;
 114                                 #interrupt-cells = <2>;
 115                                 reg = <0x7000 0x400>;
 116                                 clocks = <&rcc GPIOH>;
 117                                 st,bank-name = "GPIOH";
 118                                 ngpios = <16>;
 119                                 gpio-ranges = <&pinctrl 0 112 16>;
 120                                 status = "disabled";
 121                         };
 122
 123                         gpioi: gpio@5000a000 {
 124                                 gpio-controller;
 125                                 #gpio-cells = <2>;
 126                                 interrupt-controller;
 127                                 #interrupt-cells = <2>;
 128                                 reg = <0x8000 0x400>;
 129                                 clocks = <&rcc GPIOI>;
 130                                 st,bank-name = "GPIOI";
 131                                 ngpios = <16>;
 132                                 gpio-ranges = <&pinctrl 0 128 16>;
 133                                 status = "disabled";
 134                         };
 135
 136                         gpioj: gpio@5000b000 {
 137                                 gpio-controller;
 138                                 #gpio-cells = <2>;
 139                                 interrupt-controller;
 140                                 #interrupt-cells = <2>;
 141                                 reg = <0x9000 0x400>;
 142                                 clocks = <&rcc GPIOJ>;
 143                                 st,bank-name = "GPIOJ";
 144                                 ngpios = <16>;
 145                                 gpio-ranges = <&pinctrl 0 144 16>;
 146                                 status = "disabled";
 147                         };
 148
 149                         gpiok: gpio@5000c000 {
 150                                 gpio-controller;
 151                                 #gpio-cells = <2>;
 152                                 interrupt-controller;
 153                                 #interrupt-cells = <2>;
 154                                 reg = <0xa000 0x400>;
 155                                 clocks = <&rcc GPIOK>;
 156                                 st,bank-name = "GPIOK";
 157                                 ngpios = <8>;
 158                                 gpio-ranges = <&pinctrl 0 160 8>;
 159                                 status = "disabled";
 160                         };
 161
 162                         cec_pins_a: cec-0 {
 163                                 pins {
 164                                         pinmux = <STM32_PINMUX('A', 15, AF4)>;
 165                                         bias-disable;
 166                                         drive-open-drain;
 167                                         slew-rate = <0>;
 168                                 };
 169                         };
 170
 171                         cec_pins_sleep_a: cec-sleep-0 {
 172                                 pins {
 173                                         pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
 174                                 };
 175                         };
 176
 177                         cec_pins_b: cec-1 {
 178                                 pins {
 179                                         pinmux = <STM32_PINMUX('B', 6, AF5)>;
 180                                         bias-disable;
 181                                         drive-open-drain;
 182                                         slew-rate = <0>;
 183                                 };
 184                         };
 185
 186                         cec_pins_sleep_b: cec-sleep-1 {
 187                                 pins {
 188                                         pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
 189                                 };
 190                         };
 191
 192                         dcmi_pins_a: dcmi-0 {
 193                                 pins {
 194                                         pinmux = <STM32_PINMUX('H', 8,  AF13)>,/* DCMI_HSYNC */
 195                                                  <STM32_PINMUX('B', 7,  AF13)>,/* DCMI_VSYNC */
 196                                                  <STM32_PINMUX('A', 6,  AF13)>,/* DCMI_PIXCLK */
 197                                                  <STM32_PINMUX('H', 9,  AF13)>,/* DCMI_D0 */
 198                                                  <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
 199                                                  <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
 200                                                  <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
 201                                                  <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
 202                                                  <STM32_PINMUX('I', 4,  AF13)>,/* DCMI_D5 */
 203                                                  <STM32_PINMUX('B', 8,  AF13)>,/* DCMI_D6 */
 204                                                  <STM32_PINMUX('E', 6,  AF13)>,/* DCMI_D7 */
 205                                                  <STM32_PINMUX('I', 1,  AF13)>,/* DCMI_D8 */
 206                                                  <STM32_PINMUX('H', 7,  AF13)>,/* DCMI_D9 */
 207                                                  <STM32_PINMUX('I', 3,  AF13)>,/* DCMI_D10 */
 208                                                  <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
 209                                         bias-disable;
 210                                 };
 211                         };
 212
 213                         dcmi_sleep_pins_a: dcmi-sleep-0 {
 214                                 pins {
 215                                         pinmux = <STM32_PINMUX('H', 8,  ANALOG)>,/* DCMI_HSYNC */
 216                                                  <STM32_PINMUX('B', 7,  ANALOG)>,/* DCMI_VSYNC */
 217                                                  <STM32_PINMUX('A', 6,  ANALOG)>,/* DCMI_PIXCLK */
 218                                                  <STM32_PINMUX('H', 9,  ANALOG)>,/* DCMI_D0 */
 219                                                  <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
 220                                                  <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
 221                                                  <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
 222                                                  <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
 223                                                  <STM32_PINMUX('I', 4,  ANALOG)>,/* DCMI_D5 */
 224                                                  <STM32_PINMUX('B', 8,  ANALOG)>,/* DCMI_D6 */
 225                                                  <STM32_PINMUX('E', 6,  ANALOG)>,/* DCMI_D7 */
 226                                                  <STM32_PINMUX('I', 1,  ANALOG)>,/* DCMI_D8 */
 227                                                  <STM32_PINMUX('H', 7,  ANALOG)>,/* DCMI_D9 */
 228                                                  <STM32_PINMUX('I', 3,  ANALOG)>,/* DCMI_D10 */
 229                                                  <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
 230                                 };
 231                         };
 232
 233                         ethernet0_rgmii_pins_a: rgmii-0 {
 234                                 pins1 {
 235                                         pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
 236                                                  <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
 237                                                  <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
 238                                                  <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
 239                                                  <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
 240                                                  <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
 241                                                  <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
 242                                                  <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
 243                                                  <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
 244                                         bias-disable;
 245                                         drive-push-pull;
 246                                         slew-rate = <3>;
 247                                 };
 248                                 pins2 {
 249                                         pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
 250                                                  <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
 251                                                  <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
 252                                                  <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
 253                                                  <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
 254                                                  <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
 255                                         bias-disable;
 256                                 };
 257                         };
 258
 259                         ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
 260                                 pins1 {
 261                                         pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
 262                                                  <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
 263                                                  <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
 264                                                  <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
 265                                                  <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
 266                                                  <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
 267                                                  <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
 268                                                  <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
 269                                                  <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
 270                                                  <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
 271                                                  <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
 272                                                  <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
 273                                                  <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
 274                                                  <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
 275                                                  <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
 276                                 };
 277                         };
 278
 279                         i2c1_pins_a: i2c1-0 {
 280                                 pins {
 281                                         pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
 282                                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 283                                         bias-disable;
 284                                         drive-open-drain;
 285                                         slew-rate = <0>;
 286                                 };
 287                         };
 288
 289                         i2c1_pins_sleep_a: i2c1-1 {
 290                                 pins {
 291                                         pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
 292                                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 293                                 };
 294                         };
 295
 296                         i2c1_pins_b: i2c1-2 {
 297                                 pins {
 298                                         pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
 299                                                  <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
 300                                         bias-disable;
 301                                         drive-open-drain;
 302                                         slew-rate = <0>;
 303                                 };
 304                         };
 305
 306                         i2c1_pins_sleep_b: i2c1-3 {
 307                                 pins {
 308                                         pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
 309                                                  <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
 310                                 };
 311                         };
 312
 313                         i2c2_pins_a: i2c2-0 {
 314                                 pins {
 315                                         pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
 316                                                  <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 317                                         bias-disable;
 318                                         drive-open-drain;
 319                                         slew-rate = <0>;
 320                                 };
 321                         };
 322
 323                         i2c2_pins_sleep_a: i2c2-1 {
 324                                 pins {
 325                                         pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
 326                                                  <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 327                                 };
 328                         };
 329
 330                         i2c2_pins_b1: i2c2-2 {
 331                                 pins {
 332                                         pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
 333                                         bias-disable;
 334                                         drive-open-drain;
 335                                         slew-rate = <0>;
 336                                 };
 337                         };
 338
 339                         i2c2_pins_sleep_b1: i2c2-3 {
 340                                 pins {
 341                                         pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
 342                                 };
 343                         };
 344
 345                         i2c5_pins_a: i2c5-0 {
 346                                 pins {
 347                                         pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
 348                                                  <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
 349                                         bias-disable;
 350                                         drive-open-drain;
 351                                         slew-rate = <0>;
 352                                 };
 353                         };
 354
 355                         i2c5_pins_sleep_a: i2c5-1 {
 356                                 pins {
 357                                         pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
 358                                                  <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
 359
 360                                 };
 361                         };
 362
 363                         i2s2_pins_a: i2s2-0 {
 364                                 pins {
 365                                         pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
 366                                                  <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
 367                                                  <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
 368                                         slew-rate = <1>;
 369                                         drive-push-pull;
 370                                         bias-disable;
 371                                 };
 372                         };
 373
 374                         i2s2_pins_sleep_a: i2s2-1 {
 375                                 pins {
 376                                         pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
 377                                                  <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
 378                                                  <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
 379                                 };
 380                         };
 381
 382                         ltdc_pins_a: ltdc-a-0 {
 383                                 pins {
 384                                         pinmux = <STM32_PINMUX('G',  7, AF14)>, /* LCD_CLK */
 385                                                  <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
 386                                                  <STM32_PINMUX('I',  9, AF14)>, /* LCD_VSYNC */
 387                                                  <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
 388                                                  <STM32_PINMUX('H',  2, AF14)>, /* LCD_R0 */
 389                                                  <STM32_PINMUX('H',  3, AF14)>, /* LCD_R1 */
 390                                                  <STM32_PINMUX('H',  8, AF14)>, /* LCD_R2 */
 391                                                  <STM32_PINMUX('H',  9, AF14)>, /* LCD_R3 */
 392                                                  <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
 393                                                  <STM32_PINMUX('C',  0, AF14)>, /* LCD_R5 */
 394                                                  <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
 395                                                  <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
 396                                                  <STM32_PINMUX('E',  5, AF14)>, /* LCD_G0 */
 397                                                  <STM32_PINMUX('E',  6, AF14)>, /* LCD_G1 */
 398                                                  <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
 399                                                  <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
 400                                                  <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
 401                                                  <STM32_PINMUX('I',  0, AF14)>, /* LCD_G5 */
 402                                                  <STM32_PINMUX('I',  1, AF14)>, /* LCD_G6 */
 403                                                  <STM32_PINMUX('I',  2, AF14)>, /* LCD_G7 */
 404                                                  <STM32_PINMUX('D',  9, AF14)>, /* LCD_B0 */
 405                                                  <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
 406                                                  <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
 407                                                  <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
 408                                                  <STM32_PINMUX('I',  4, AF14)>, /* LCD_B4 */
 409                                                  <STM32_PINMUX('A',  3, AF14)>, /* LCD_B5 */
 410                                                  <STM32_PINMUX('B',  8, AF14)>, /* LCD_B6 */
 411                                                  <STM32_PINMUX('D',  8, AF14)>; /* LCD_B7 */
 412                                         bias-disable;
 413                                         drive-push-pull;
 414                                         slew-rate = <1>;
 415                                 };
 416                         };
 417
 418                         ltdc_pins_sleep_a: ltdc-a-1 {
 419                                 pins {
 420                                         pinmux = <STM32_PINMUX('G',  7, ANALOG)>, /* LCD_CLK */
 421                                                  <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
 422                                                  <STM32_PINMUX('I',  9, ANALOG)>, /* LCD_VSYNC */
 423                                                  <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
 424                                                  <STM32_PINMUX('H',  2, ANALOG)>, /* LCD_R0 */
 425                                                  <STM32_PINMUX('H',  3, ANALOG)>, /* LCD_R1 */
 426                                                  <STM32_PINMUX('H',  8, ANALOG)>, /* LCD_R2 */
 427                                                  <STM32_PINMUX('H',  9, ANALOG)>, /* LCD_R3 */
 428                                                  <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
 429                                                  <STM32_PINMUX('C',  0, ANALOG)>, /* LCD_R5 */
 430                                                  <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
 431                                                  <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
 432                                                  <STM32_PINMUX('E',  5, ANALOG)>, /* LCD_G0 */
 433                                                  <STM32_PINMUX('E',  6, ANALOG)>, /* LCD_G1 */
 434                                                  <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
 435                                                  <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
 436                                                  <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
 437                                                  <STM32_PINMUX('I',  0, ANALOG)>, /* LCD_G5 */
 438                                                  <STM32_PINMUX('I',  1, ANALOG)>, /* LCD_G6 */
 439                                                  <STM32_PINMUX('I',  2, ANALOG)>, /* LCD_G7 */
 440                                                  <STM32_PINMUX('D',  9, ANALOG)>, /* LCD_B0 */
 441                                                  <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
 442                                                  <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
 443                                                  <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
 444                                                  <STM32_PINMUX('I',  4, ANALOG)>, /* LCD_B4 */
 445                                                  <STM32_PINMUX('A',  3, ANALOG)>, /* LCD_B5 */
 446                                                  <STM32_PINMUX('B',  8, ANALOG)>, /* LCD_B6 */
 447                                                  <STM32_PINMUX('D',  8, ANALOG)>; /* LCD_B7 */
 448                                 };
 449                         };
 450
 451                         ltdc_pins_b: ltdc-b-0 {
 452                                 pins {
 453                                         pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
 454                                                  <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
 455                                                  <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
 456                                                  <STM32_PINMUX('K',  7, AF14)>, /* LCD_DE */
 457                                                  <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
 458                                                  <STM32_PINMUX('J',  0, AF14)>, /* LCD_R1 */
 459                                                  <STM32_PINMUX('J',  1, AF14)>, /* LCD_R2 */
 460                                                  <STM32_PINMUX('J',  2, AF14)>, /* LCD_R3 */
 461                                                  <STM32_PINMUX('J',  3, AF14)>, /* LCD_R4 */
 462                                                  <STM32_PINMUX('J',  4, AF14)>, /* LCD_R5 */
 463                                                  <STM32_PINMUX('J',  5, AF14)>, /* LCD_R6 */
 464                                                  <STM32_PINMUX('J',  6, AF14)>, /* LCD_R7 */
 465                                                  <STM32_PINMUX('J',  7, AF14)>, /* LCD_G0 */
 466                                                  <STM32_PINMUX('J',  8, AF14)>, /* LCD_G1 */
 467                                                  <STM32_PINMUX('J',  9, AF14)>, /* LCD_G2 */
 468                                                  <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
 469                                                  <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
 470                                                  <STM32_PINMUX('K',  0, AF14)>, /* LCD_G5 */
 471                                                  <STM32_PINMUX('K',  1, AF14)>, /* LCD_G6 */
 472                                                  <STM32_PINMUX('K',  2, AF14)>, /* LCD_G7 */
 473                                                  <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
 474                                                  <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
 475                                                  <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
 476                                                  <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
 477                                                  <STM32_PINMUX('K',  3, AF14)>, /* LCD_B4 */
 478                                                  <STM32_PINMUX('K',  4, AF14)>, /* LCD_B5 */
 479                                                  <STM32_PINMUX('K',  5, AF14)>, /* LCD_B6 */
 480                                                  <STM32_PINMUX('K',  6, AF14)>; /* LCD_B7 */
 481                                         bias-disable;
 482                                         drive-push-pull;
 483                                         slew-rate = <1>;
 484                                 };
 485                         };
 486
 487                         ltdc_pins_sleep_b: ltdc-b-1 {
 488                                 pins {
 489                                         pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
 490                                                  <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
 491                                                  <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
 492                                                  <STM32_PINMUX('K',  7, ANALOG)>, /* LCD_DE */
 493                                                  <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
 494                                                  <STM32_PINMUX('J',  0, ANALOG)>, /* LCD_R1 */
 495                                                  <STM32_PINMUX('J',  1, ANALOG)>, /* LCD_R2 */
 496                                                  <STM32_PINMUX('J',  2, ANALOG)>, /* LCD_R3 */
 497                                                  <STM32_PINMUX('J',  3, ANALOG)>, /* LCD_R4 */
 498                                                  <STM32_PINMUX('J',  4, ANALOG)>, /* LCD_R5 */
 499                                                  <STM32_PINMUX('J',  5, ANALOG)>, /* LCD_R6 */
 500                                                  <STM32_PINMUX('J',  6, ANALOG)>, /* LCD_R7 */
 501                                                  <STM32_PINMUX('J',  7, ANALOG)>, /* LCD_G0 */
 502                                                  <STM32_PINMUX('J',  8, ANALOG)>, /* LCD_G1 */
 503                                                  <STM32_PINMUX('J',  9, ANALOG)>, /* LCD_G2 */
 504                                                  <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
 505                                                  <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
 506                                                  <STM32_PINMUX('K',  0, ANALOG)>, /* LCD_G5 */
 507                                                  <STM32_PINMUX('K',  1, ANALOG)>, /* LCD_G6 */
 508                                                  <STM32_PINMUX('K',  2, ANALOG)>, /* LCD_G7 */
 509                                                  <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
 510                                                  <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
 511                                                  <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
 512                                                  <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
 513                                                  <STM32_PINMUX('K',  3, ANALOG)>, /* LCD_B4 */
 514                                                  <STM32_PINMUX('K',  4, ANALOG)>, /* LCD_B5 */
 515                                                  <STM32_PINMUX('K',  5, ANALOG)>, /* LCD_B6 */
 516                                                  <STM32_PINMUX('K',  6, ANALOG)>; /* LCD_B7 */
 517                                 };
 518                         };
 519
 520                         m_can1_pins_a: m-can1-0 {
 521                                 pins1 {
 522                                         pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
 523                                         slew-rate = <1>;
 524                                         drive-push-pull;
 525                                         bias-disable;
 526                                 };
 527                                 pins2 {
 528                                         pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
 529                                         bias-disable;
 530                                 };
 531                         };
 532
 533                         m_can1_sleep_pins_a: m_can1-sleep@0 {
 534                                 pins {
 535                                         pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
 536                                                  <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
 537                                 };
 538                         };
 539
 540                         pwm2_pins_a: pwm2-0 {
 541                                 pins {
 542                                         pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
 543                                         bias-pull-down;
 544                                         drive-push-pull;
 545                                         slew-rate = <0>;
 546                                 };
 547                         };
 548
 549                         pwm8_pins_a: pwm8-0 {
 550                                 pins {
 551                                         pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
 552                                         bias-pull-down;
 553                                         drive-push-pull;
 554                                         slew-rate = <0>;
 555                                 };
 556                         };
 557
 558                         pwm12_pins_a: pwm12-0 {
 559                                 pins {
 560                                         pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
 561                                         bias-pull-down;
 562                                         drive-push-pull;
 563                                         slew-rate = <0>;
 564                                 };
 565                         };
 566
 567                         qspi_clk_pins_a: qspi-clk-0 {
 568                                 pins {
 569                                         pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
 570                                         bias-disable;
 571                                         drive-push-pull;
 572                                         slew-rate = <3>;
 573                                 };
 574                         };
 575
 576                         qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
 577                                 pins {
 578                                         pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
 579                                 };
 580                         };
 581
 582                         qspi_bk1_pins_a: qspi-bk1-0 {
 583                                 pins1 {
 584                                         pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
 585                                                  <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
 586                                                  <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
 587                                                  <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
 588                                         bias-disable;
 589                                         drive-push-pull;
 590                                         slew-rate = <3>;
 591                                 };
 592                                 pins2 {
 593                                         pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
 594                                         bias-pull-up;
 595                                         drive-push-pull;
 596                                         slew-rate = <3>;
 597                                 };
 598                         };
 599
 600                         qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
 601                                 pins {
 602                                         pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
 603                                                  <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
 604                                                  <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
 605                                                  <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
 606                                                  <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
 607                                 };
 608                         };
 609
 610                         qspi_bk2_pins_a: qspi-bk2-0 {
 611                                 pins1 {
 612                                         pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
 613                                                  <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
 614                                                  <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
 615                                                  <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
 616                                         bias-disable;
 617                                         drive-push-pull;
 618                                         slew-rate = <3>;
 619                                 };
 620                                 pins2 {
 621                                         pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
 622                                         bias-pull-up;
 623                                         drive-push-pull;
 624                                         slew-rate = <3>;
 625                                 };
 626                         };
 627
 628                         qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
 629                                 pins {
 630                                         pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
 631                                                  <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
 632                                                  <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
 633                                                  <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
 634                                                  <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
 635                                 };
 636                         };
 637
 638                         sai2a_pins_a: sai2a-0 {
 639                                 pins {
 640                                         pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
 641                                                  <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
 642                                                  <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
 643                                                  <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
 644                                         slew-rate = <0>;
 645                                         drive-push-pull;
 646                                         bias-disable;
 647                                 };
 648                         };
 649
 650                         sai2a_sleep_pins_a: sai2a-1 {
 651                                 pins {
 652                                         pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
 653                                                  <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
 654                                                  <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
 655                                                  <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
 656                                 };
 657                         };
 658
 659                         sai2b_pins_a: sai2b-0 {
 660                                 pins1 {
 661                                         pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
 662                                                  <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
 663                                                  <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
 664                                         slew-rate = <0>;
 665                                         drive-push-pull;
 666                                         bias-disable;
 667                                 };
 668                                 pins2 {
 669                                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 670                                         bias-disable;
 671                                 };
 672                         };
 673
 674                         sai2b_sleep_pins_a: sai2b-1 {
 675                                 pins {
 676                                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
 677                                                  <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
 678                                                  <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
 679                                                  <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
 680                                 };
 681                         };
 682
 683                         sai2b_pins_b: sai2b-2 {
 684                                 pins {
 685                                         pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
 686                                         bias-disable;
 687                                 };
 688                         };
 689
 690                         sai2b_sleep_pins_b: sai2b-3 {
 691                                 pins {
 692                                         pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
 693                                 };
 694                         };
 695
 696                         sai4a_pins_a: sai4a-0 {
 697                                 pins {
 698                                         pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
 699                                         slew-rate = <0>;
 700                                         drive-push-pull;
 701                                         bias-disable;
 702                                 };
 703                         };
 704
 705                         sai4a_sleep_pins_a: sai4a-1 {
 706                                 pins {
 707                                         pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
 708                                 };
 709                         };
 710
 711                         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
 712                                 pins {
 713                                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 714                                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 715                                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 716                                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
 717                                                  <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
 718                                                  <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 719                                         slew-rate = <3>;
 720                                         drive-push-pull;
 721                                         bias-disable;
 722                                 };
 723                         };
 724
 725                         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
 726                                 pins1 {
 727                                         pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
 728                                                  <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
 729                                                  <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
 730                                                  <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
 731                                                  <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
 732                                         slew-rate = <3>;
 733                                         drive-push-pull;
 734                                         bias-disable;
 735                                 };
 736                                 pins2{
 737                                         pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
 738                                         slew-rate = <3>;
 739                                         drive-open-drain;
 740                                         bias-disable;
 741                                 };
 742                         };
 743
 744                         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
 745                                 pins {
 746                                         pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
 747                                                  <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
 748                                                  <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
 749                                                  <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
 750                                                  <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
 751                                                  <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
 752                                 };
 753                         };
 754
 755                         sdmmc1_dir_pins_a: sdmmc1-dir-0 {
 756                                 pins1 {
 757                                         pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
 758                                                  <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
 759                                                  <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
 760                                         slew-rate = <3>;
 761                                         drive-push-pull;
 762                                         bias-pull-up;
 763                                 };
 764                                 pins2{
 765                                         pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
 766                                         bias-pull-up;
 767                                 };
 768                         };
 769
 770                         sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
 771                                 pins {
 772                                         pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
 773                                                  <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
 774                                                  <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
 775                                                  <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
 776                                 };
 777                         };
 778
 779                         spdifrx_pins_a: spdifrx-0 {
 780                                 pins {
 781                                         pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
 782                                         bias-disable;
 783                                 };
 784                         };
 785
 786                         spdifrx_sleep_pins_a: spdifrx-1 {
 787                                 pins {
 788                                         pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
 789                                 };
 790                         };
 791
 792                         uart4_pins_a: uart4-0 {
 793                                 pins1 {
 794                                         pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
 795                                         bias-disable;
 796                                         drive-push-pull;
 797                                         slew-rate = <0>;
 798                                 };
 799                                 pins2 {
 800                                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
 801                                         bias-disable;
 802                                 };
 803                         };
 804
 805                         uart4_pins_b: uart4-1 {
 806                                 pins1 {
 807                                         pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
 808                                         bias-disable;
 809                                         drive-push-pull;
 810                                         slew-rate = <0>;
 811                                 };
 812                                 pins2 {
 813                                         pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
 814                                         bias-disable;
 815                                 };
 816                         };
 817
 818                         uart7_pins_a: uart7-0 {
 819                                 pins1 {
 820                                         pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
 821                                         bias-disable;
 822                                         drive-push-pull;
 823                                         slew-rate = <0>;
 824                                 };
 825                                 pins2 {
 826                                         pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */
 827                                                  <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */
 828                                                  <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */
 829                                         bias-disable;
 830                                 };
 831                         };
 832                 };
 833
 834                 pinctrl_z: pin-controller-z@54004000 {
 835                         #address-cells = <1>;
 836                         #size-cells = <1>;
 837                         compatible = "st,stm32mp157-z-pinctrl";
 838                         ranges = <0 0x54004000 0x400>;
 839                         pins-are-numbered;
 840                         interrupt-parent = <&exti>;
 841                         st,syscfg = <&exti 0x60 0xff>;
 842
 843                         gpioz: gpio@54004000 {
 844                                 gpio-controller;
 845                                 #gpio-cells = <2>;
 846                                 interrupt-controller;
 847                                 #interrupt-cells = <2>;
 848                                 reg = <0 0x400>;
 849                                 clocks = <&rcc GPIOZ>;
 850                                 st,bank-name = "GPIOZ";
 851                                 st,bank-ioport = <11>;
 852                                 ngpios = <8>;
 853                                 gpio-ranges = <&pinctrl_z 0 400 8>;
 854                                 status = "disabled";
 855                         };
 856
 857                         i2c2_pins_b2: i2c2-0 {
 858                                 pins {
 859                                         pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
 860                                         bias-disable;
 861                                         drive-open-drain;
 862                                         slew-rate = <0>;
 863                                 };
 864                         };
 865
 866                         i2c2_pins_sleep_b2: i2c2-1 {
 867                                 pins {
 868                                         pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
 869                                 };
 870                         };
 871
 872                         i2c4_pins_a: i2c4-0 {
 873                                 pins {
 874                                         pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
 875                                                  <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
 876                                         bias-disable;
 877                                         drive-open-drain;
 878                                         slew-rate = <0>;
 879                                 };
 880                         };
 881
 882                         i2c4_pins_sleep_a: i2c4-1 {
 883                                 pins {
 884                                         pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
 885                                                  <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
 886                                 };
 887                         };
 888
 889                         spi1_pins_a: spi1-0 {
 890                                 pins1 {
 891                                         pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
 892                                                  <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
 893                                         bias-disable;
 894                                         drive-push-pull;
 895                                         slew-rate = <1>;
 896                                 };
 897
 898                                 pins2 {
 899                                         pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
 900                                         bias-disable;
 901                                 };
 902                         };
 903                 };
 904         };
 905 };