1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Veyron Minnie Rev 0+ board device tree source
5 * Copyright 2015 Google, Inc
9 #include "rk3288-veyron-chromebook.dtsi"
12 model = "Google Minnie";
13 compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
14 "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
15 "google,veyron-minnie-rev0", "google,veyron-minnie",
16 "google,veyron", "rockchip,rk3288";
18 backlight_regulator: backlight-regulator {
19 compatible = "regulator-fixed";
21 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&bl_pwr_en>;
24 regulator-name = "backlight_regulator";
25 vin-supply = <&vcc33_sys>;
26 startup-delay-us = <15000>;
29 panel_regulator: panel-regulator {
30 compatible = "regulator-fixed";
32 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&lcd_enable_h>;
35 regulator-name = "panel_regulator";
36 startup-delay-us = <100000>;
37 vin-supply = <&vcc33_sys>;
40 vcc18_lcd: vcc18-lcd {
41 compatible = "regulator-fixed";
43 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
44 pinctrl-names = "default";
45 pinctrl-0 = <&avdd_1v8_disp_en>;
46 regulator-name = "vcc18_lcd";
49 vin-supply = <&vcc18_wl>;
52 volume_buttons: volume-buttons {
53 compatible = "gpio-keys";
54 pinctrl-names = "default";
55 pinctrl-0 = <&volum_down_l &volum_up_l>;
59 gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
60 linux,code = <KEY_VOLUMEDOWN>;
61 debounce-interval = <100>;
66 gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
67 linux,code = <KEY_VOLUMEUP>;
68 debounce-interval = <100>;
74 /* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
78 16 17 18 19 20 21 22 23
79 24 25 26 27 28 29 30 31
80 32 33 34 35 36 37 38 39
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90 112 113 114 115 116 117 118 119
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92 128 129 130 131 132 133 134 135
93 136 137 138 139 140 141 142 143
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103 216 217 218 219 220 221 222 223
104 224 225 226 227 228 229 230 231
105 232 233 234 235 236 237 238 239
106 240 241 242 243 244 245 246 247
107 248 249 250 251 252 253 254 255>;
108 power-supply = <&backlight_regulator>;
112 battery: bq27500@55 {
113 compatible = "ti,bq27500";
121 clock-frequency = <400000>;
122 i2c-scl-falling-time-ns = <50>;
123 i2c-scl-rising-time-ns = <300>;
126 compatible = "elan,ekth3500";
128 interrupt-parent = <&gpio2>;
129 interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&touch_int &touch_rst>;
132 reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
133 vcc33-supply = <&vcc33_touch>;
134 vccio-supply = <&vcc33_touch>;
139 compatible = "auo,b101ean01", "simple-panel";
140 power-supply= <&panel_regulator>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
148 vcc33_touch: LDO_REG2 {
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 regulator-name = "vcc33_touch";
152 regulator-state-mem {
153 regulator-off-in-suspend;
157 vcc5v_touch: SWITCH_REG2 {
158 regulator-name = "vcc5v_touch";
159 regulator-state-mem {
160 regulator-off-in-suspend;
168 pinctrl-names = "default";
169 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
175 gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&drv_5v>;
182 gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&vcc50_hdmi_en>;
188 gpio-line-names = "PMIC_SLEEP_AP",
199 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
216 gpio-line-names = "CONFIG0",
239 gpio-line-names = "FLASH0_D0",
257 "FLASH0_CS2/EMMC_CMD",
259 "FLASH0_DQS/EMMC_CLKO";
263 gpio-line-names = "",
301 gpio-line-names = "",
326 gpio-line-names = "I2S0_SCLK",
353 gpio-line-names = "LCDC_BL",
360 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
386 gpio-line-names = "RAM_ID0",
401 bl_pwr_en: bl_pwr_en {
402 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
408 rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
413 volum_down_l: volum-down-l {
414 rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
417 volum_up_l: volum-up-l {
418 rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
423 vcc50_hdmi_en: vcc50-hdmi-en {
424 rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
429 lcd_enable_h: lcd-en {
430 rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
433 avdd_1v8_disp_en: avdd-1v8-disp-en {
434 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
440 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
444 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
449 gpio_prochot: gpio-prochot {
450 rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
455 touch_int: touch-int {
456 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
459 touch_rst: touch-rst {
460 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;