Linux-libre 5.4.48-gnu
[librecmc/linux-libre.git] / arch / arm / boot / dts / imx6ul-opos6uldev.dts
1 /*
2  * Copyright 2017 Armadeus Systems <support@armadeus.com>
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
47
48 /dts-v1/;
49 #include "imx6ul-opos6ul.dtsi"
50
51 / {
52         model = "Armadeus Systems OPOS6UL SoM on OPOS6ULDev board";
53         compatible = "armadeus,opos6uldev", "armadeus,opos6ul", "fsl,imx6ul";
54
55         chosen {
56                 stdout-path = &uart1;
57         };
58
59         backlight: backlight {
60                 compatible = "pwm-backlight";
61                 pwms = <&pwm3 0 191000>;
62                 brightness-levels = <0 4 8 16 32 64 128 255>;
63                 default-brightness-level = <7>;
64                 power-supply = <&reg_5v>;
65                 status = "okay";
66         };
67
68         gpio-keys {
69                 compatible = "gpio-keys";
70                 pinctrl-names = "default";
71                 pinctrl-0 = <&pinctrl_gpio_keys>;
72
73                 user-button {
74                         label = "User button";
75                         gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
76                         linux,code = <BTN_MISC>;
77                         wakeup-source;
78                 };
79         };
80
81         leds {
82                 compatible = "gpio-leds";
83
84                 user-led {
85                         label = "User";
86                         pinctrl-names = "default";
87                         pinctrl-0 = <&pinctrl_led>;
88                         gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
89                         linux,default-trigger = "heartbeat";
90                 };
91         };
92
93         onewire {
94                 compatible = "w1-gpio";
95                 pinctrl-names = "default";
96                 pinctrl-0 = <&pinctrl_w1>;
97                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
98         };
99
100         panel: panel {
101                 compatible = "armadeus,st0700-adapt";
102                 power-supply = <&reg_3v3>;
103                 backlight = <&backlight>;
104
105                 port {
106                         panel_in: endpoint {
107                                 remote-endpoint = <&lcdif_out>;
108                         };
109                 };
110         };
111
112         reg_5v: regulator-5v {
113                 compatible = "regulator-fixed";
114                 regulator-name = "5V";
115                 regulator-min-microvolt = <5000000>;
116                 regulator-max-microvolt = <5000000>;
117         };
118
119         reg_usbotg1_vbus: regulator-usbotg1vbus {
120                 compatible = "regulator-fixed";
121                 regulator-name = "usbotg1vbus";
122                 regulator-min-microvolt = <5000000>;
123                 regulator-max-microvolt = <5000000>;
124                 pinctrl-names = "default";
125                 pinctrl-0 = <&pinctrl_usbotg1_vbus>;
126                 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
127                 enable-active-high;
128         };
129
130         reg_usbotg2_vbus: regulator-usbotg2vbus {
131                 compatible = "regulator-fixed";
132                 regulator-name = "usbotg2vbus";
133                 regulator-min-microvolt = <5000000>;
134                 regulator-max-microvolt = <5000000>;
135                 pinctrl-names = "default";
136                 pinctrl-0 = <&pinctrl_usbotg2_vbus>;
137                 gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
138                 enable-active-high;
139         };
140 };
141
142 &adc1 {
143         vref-supply = <&reg_3v3>;
144         status = "okay";
145 };
146
147 &can1 {
148         pinctrl-names = "default";
149         pinctrl-0 = <&pinctrl_flexcan1>;
150         xceiver-supply = <&reg_5v>;
151         status = "okay";
152 };
153
154 &can2 {
155         pinctrl-names = "default";
156         pinctrl-0 = <&pinctrl_flexcan2>;
157         xceiver-supply = <&reg_5v>;
158         status = "okay";
159 };
160
161 &ecspi4 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&pinctrl_ecspi4>;
164         cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
165         status = "okay";
166
167         spidev0: spi@0 {
168                 compatible = "spidev";
169                 reg = <0>;
170                 spi-max-frequency = <5000000>;
171         };
172
173         spidev1: spi@1 {
174                 compatible = "spidev";
175                 reg = <1>;
176                 spi-max-frequency = <5000000>;
177         };
178 };
179
180 &i2c1 {
181         pinctrl-names = "default";
182         pinctrl-0 = <&pinctrl_i2c1>;
183         clock_frequency = <400000>;
184         status = "okay";
185 };
186
187 &i2c2 {
188         pinctrl-names = "default";
189         pinctrl-0 = <&pinctrl_i2c2>;
190         clock_frequency = <400000>;
191         status = "okay";
192 };
193
194 &lcdif {
195         pinctrl-names = "default";
196         pinctrl-0 = <&pinctrl_lcdif>;
197         status = "okay";
198
199         port {
200                 lcdif_out: endpoint {
201                         remote-endpoint = <&panel_in>;
202                 };
203         };
204 };
205
206 &pwm3 {
207         pinctrl-names = "default";
208         pinctrl-0 = <&pinctrl_pwm3>;
209         status = "okay";
210 };
211
212 &snvs_pwrkey {
213         status = "disabled";
214 };
215
216 &tsc {
217         pinctrl-names = "default";
218         pinctrl-0 = <&pinctrl_tsc>;
219         xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
220         measure-delay-time = <0xffff>;
221         pre-charge-time = <0xffff>;
222         status = "okay";
223 };
224
225 &uart1 {
226         pinctrl-names = "default";
227         pinctrl-0 = <&pinctrl_uart1>;
228         status = "okay";
229 };
230
231 &uart2 {
232         pinctrl-names = "default";
233         pinctrl-0 = <&pinctrl_uart2>;
234         status = "okay";
235 };
236
237 &usbotg1 {
238         pinctrl-names = "default";
239         pinctrl-0 = <&pinctrl_usbotg1_id>;
240         vbus-supply = <&reg_usbotg1_vbus>;
241         dr_mode = "otg";
242         disable-over-current;
243         status = "okay";
244 };
245
246 &usbotg2 {
247         vbus-supply = <&reg_usbotg2_vbus>;
248         dr_mode = "host";
249         disable-over-current;
250         status = "okay";
251 };
252
253 &iomuxc {
254         pinctrl-names = "default";
255         pinctrl-0 = <&pinctrl_gpios>;
256
257         pinctrl_ecspi4: ecspi4grp {
258                 fsl,pins = <
259                         MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK      0x1b0b0
260                         MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI      0x1b0b0
261                         MX6UL_PAD_NAND_DATA06__ECSPI4_MISO      0x1b0b0
262                         MX6UL_PAD_NAND_DATA01__GPIO4_IO03       0x1b0b0
263                         MX6UL_PAD_NAND_DATA07__GPIO4_IO09       0x1b0b0
264                 >;
265         };
266
267         pinctrl_flexcan1: flexcan1grp {
268                 fsl,pins = <
269                         MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x0b0b0
270                         MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x0b0b0
271                 >;
272         };
273
274         pinctrl_flexcan2: flexcan2grp {
275                 fsl,pins = <
276                         MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x0b0b0
277                         MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x0b0b0
278                 >;
279         };
280
281         pinctrl_gpios: gpiosgrp {
282                 fsl,pins = <
283                         MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x0b0b0
284                         MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25     0x0b0b0
285                         MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24     0x0b0b0
286                         MX6UL_PAD_NAND_RE_B__GPIO4_IO00         0x0b0b0
287                         MX6UL_PAD_GPIO1_IO08__GPIO1_IO08        0x0b0b0
288                         MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x0b0b0
289                         MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x0b0b0
290                         MX6UL_PAD_NAND_WE_B__GPIO4_IO01         0x0b0b0
291                         MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x0b0b0
292                         MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02      0x0b0b0
293                         MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03      0x0b0b0
294                         MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x0b0b0
295                         MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05      0x0b0b0
296                         MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06      0x0b0b0
297                         MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x0b0b0
298                         MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x0b0b0
299                 >;
300         };
301
302         pinctrl_gpio_keys: gpiokeysgrp {
303                 fsl,pins = <
304                         MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11    0x0b0b0
305                 >;
306         };
307
308         pinctrl_i2c1: i2c1grp {
309                 fsl,pins = <
310                         MX6UL_PAD_UART4_RX_DATA__I2C1_SDA       0x4001b8b0
311                         MX6UL_PAD_UART4_TX_DATA__I2C1_SCL       0x4001b8b0
312                 >;
313         };
314
315         pinctrl_i2c2: i2c2grp {
316                 fsl,pins = <
317                         MX6UL_PAD_UART5_RX_DATA__I2C2_SDA       0x4001b8b0
318                         MX6UL_PAD_UART5_TX_DATA__I2C2_SCL       0x4001b8b0
319                 >;
320         };
321
322         pinctrl_lcdif: lcdifgrp {
323                 fsl,pins = <
324                         MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x100b1
325                         MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x100b1
326                         MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x100b1
327                         MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x100b1
328                         MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x100b1
329                         MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x100b1
330                         MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x100b1
331                         MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x100b1
332                         MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x100b1
333                         MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x100b1
334                         MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x100b1
335                         MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x100b1
336                         MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x100b1
337                         MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x100b1
338                         MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x100b1
339                         MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x100b1
340                         MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x100b1
341                         MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x100b1
342                         MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x100b1
343                         MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x100b1
344                         MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x100b1
345                         MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x100b1
346                 >;
347         };
348
349         pinctrl_led: ledgrp {
350                 fsl,pins = <
351                         MX6UL_PAD_LCD_RESET__GPIO3_IO04         0x0b0b0
352                 >;
353         };
354
355         pinctrl_pwm3: pwm3grp {
356                 fsl,pins = <
357                         MX6UL_PAD_NAND_ALE__PWM3_OUT            0x1b0b0
358                 >;
359         };
360
361         pinctrl_tsc: tscgrp {
362                 fsl,pins = <
363                         MX6UL_PAD_GPIO1_IO01__GPIO1_IO01       0xb0
364                         MX6UL_PAD_GPIO1_IO02__GPIO1_IO02       0xb0
365                         MX6UL_PAD_GPIO1_IO03__GPIO1_IO03       0xb0
366                         MX6UL_PAD_GPIO1_IO04__GPIO1_IO04       0xb0
367                 >;
368         };
369
370         pinctrl_uart1: uart1grp {
371                 fsl,pins = <
372                         MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX   0x1b0b1
373                         MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX   0x1b0b1
374                 >;
375         };
376
377         pinctrl_uart2: uart2grp {
378                 fsl,pins = <
379                         MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
380                         MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
381                 >;
382         };
383
384         pinctrl_usbotg1_id: usbotg1idgrp {
385                 fsl,pins = <
386                         MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x1b0b0
387                 >;
388         };
389
390         pinctrl_usbotg1_vbus: usbotg1vbusgrp {
391                 fsl,pins = <
392                         MX6UL_PAD_GPIO1_IO05__GPIO1_IO05        0x1b0b0
393                 >;
394         };
395
396         pinctrl_usbotg2_vbus: usbotg2vbusgrp {
397                 fsl,pins = <
398                         MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x1b0b0
399                 >;
400         };
401
402         pinctrl_w1: w1grp {
403                 fsl,pins = <
404                         MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0x0b0b0
405                 >;
406         };
407 };