1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
5 * Based on "omap4.dtsi"
11 compatible = "ti,dra722", "ti,dra72", "ti,dra7";
14 compatible = "arm,cortex-a15-pmu";
15 interrupt-parent = <&wakeupgen>;
16 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
21 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
22 compatible = "ti,sysc-omap4", "ti,sysc";
25 reg-names = "rev", "sysc";
26 ti,sysc-midle = <SYSC_IDLE_FORCE>,
28 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
30 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
34 ranges = <0x0 0x5b000 0x1000>;
37 compatible = "ti,dra72-cal";
41 reg-names = "cal_top",
44 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
45 ti,camerrx-control = <&scm_conf 0xE94>;
66 reg-names = "dss", "pll1_clkctrl", "pll1";
68 clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
69 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>;
70 clock-names = "fck", "video1_clk";
74 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
79 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
87 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
95 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
99 compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
103 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";