1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-cosino.dtsi - Device Tree file for Cosino core module
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
8 * Derived from at91sam9x5ek.dtsi by:
9 * Copyright (C) 2012 Atmel,
10 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
13 #include "at91sam9g35.dtsi"
16 model = "HCE Cosino core module";
17 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
20 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
24 reg = <0x20000000 0x8000000>;
29 clock-frequency = <32768>;
33 clock-frequency = <12000000>;
39 tcb0: timer@f8008000 {
41 compatible = "atmel,tcb-timer";
46 compatible = "atmel,tcb-timer";
54 &pinctrl_mmc0_slot0_clk_cmd_dat0
55 &pinctrl_mmc0_slot0_dat1_3>;
60 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
64 dbgu: serial@fffff200 {
68 usart0: serial@f801c000 {
77 atmel,adc-ts-wires = <4>;
78 atmel,adc-ts-pressure-threshold = <10000>;
84 pinctrl_board_mmc0: mmc0-board {
86 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
97 pinctrl-0 = <&pinctrl_ebi_addr_nand
98 &pinctrl_ebi_data_0_7>;
99 pinctrl-names = "default";
102 nand_controller: nand-controller {
104 pinctrl-0 = <&pinctrl_nand_oe_we
107 pinctrl-names = "default";
110 reg = <0x3 0x0 0x800000>;
111 rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
112 cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
113 nand-bus-width = <8>;
114 nand-ecc-mode = "hw";
115 nand-ecc-strength = <4>;
116 nand-ecc-step-size = <512>;
118 label = "atmel_nand";
121 compatible = "fixed-partitions";
122 #address-cells = <1>;
126 label = "at91bootstrap";
132 reg = <0x40000 0x80000>;
136 label = "U-Boot Env";
137 reg = <0xc0000 0x140000>;
142 reg = <0x200000 0x600000>;
147 reg = <0x800000 0x0f800000>;