1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/irq.h>
11 model = "TI AM335x BeagleBone Blue";
12 compatible = "ti,am335x-bone-blue", "ti,am33xx";
16 cpu0-supply = <&dcdc2_reg>;
21 device_type = "memory";
22 reg = <0x80000000 0x20000000>; /* 512 MB */
30 pinctrl-names = "default";
31 pinctrl-0 = <&user_leds_s0>;
33 compatible = "gpio-leds";
36 label = "beaglebone:green:usr0";
37 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
38 linux,default-trigger = "heartbeat";
39 default-state = "off";
43 label = "beaglebone:green:usr1";
44 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
45 linux,default-trigger = "mmc0";
46 default-state = "off";
50 label = "beaglebone:green:usr2";
51 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
52 linux,default-trigger = "cpu0";
53 default-state = "off";
57 label = "beaglebone:green:usr3";
58 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "mmc1";
60 default-state = "off";
65 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
66 default-state = "off";
67 linux,default-trigger = "phy0assoc";
72 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
73 default-state = "off";
78 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
79 default-state = "off";
84 gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
90 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
96 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
97 default-state = "off";
102 gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
103 default-state = "off";
107 vmmcsd_fixed: fixedregulator0 {
108 compatible = "regulator-fixed";
109 regulator-name = "vmmcsd_fixed";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
114 wlan_en_reg: fixedregulator@2 {
115 compatible = "regulator-fixed";
116 regulator-name = "wlan-en-regulator";
117 regulator-min-microvolt = <1800000>;
118 regulator-max-microvolt = <1800000>;
119 startup-delay-us= <70000>;
128 user_leds_s0: user_leds_s0 {
129 pinctrl-single,pins = <
130 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
131 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
132 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
133 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
134 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */
135 AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */
136 AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */
137 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */
138 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
139 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
140 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
145 i2c0_pins: pinmux_i2c0_pins {
146 pinctrl-single,pins = <
147 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
148 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
152 i2c2_pins: pinmux_i2c2_pins {
153 pinctrl-single,pins = <
154 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
155 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
160 uart0_pins: pinmux_uart0_pins {
161 pinctrl-single,pins = <
162 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
163 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
168 uart1_pins: pinmux_uart1_pins {
169 pinctrl-single,pins = <
170 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
171 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
176 uart2_pins: pinmux_uart2_pins {
177 pinctrl-single,pins = <
178 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */
179 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (B17) spi0_d0.uart2_txd */
184 uart4_pins: pinmux_uart4_pins {
185 pinctrl-single,pins = <
186 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
191 uart5_pins: pinmux_uart5_pins {
192 pinctrl-single,pins = <
193 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */
194 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* (U1) lcd_data8.uart5_txd */
198 mmc1_pins: pinmux_mmc1_pins {
199 pinctrl-single,pins = <
200 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
204 mmc2_pins: pinmux_mmc2_pins {
205 pinctrl-single,pins = <
206 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */
207 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */
208 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */
209 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */
210 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */
211 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */
212 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */
213 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */
214 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */
215 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */
219 mmc3_pins: pinmux_mmc3_pins {
220 pinctrl-single,pins = <
221 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6) /* (L15) gmii1_rxd1.mmc2_clk */
222 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6) /* (J16) gmii1_txen.mmc2_cmd */
223 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5) /* (J17) gmii1_rxdv.mmc2_dat0 */
224 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5) /* (J18) gmii1_txd3.mmc2_dat1 */
225 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5) /* (K15) gmii1_txd2.mmc2_dat2 */
226 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5) /* (H16) gmii1_col.mmc2_dat3 */
230 bt_pins: pinmux_bt_pins {
231 pinctrl-single,pins = <
232 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] - BT_EN */
236 uart3_pins: pinmux_uart3_pins {
237 pinctrl-single,pins = <
238 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
239 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
240 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* (M17) mdio_data.uart3_ctsn */
241 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* (M18) mdio_clk.uart3_rtsn */
245 wl18xx_pins: pinmux_wl18xx_pins {
246 pinctrl-single,pins = <
247 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */
248 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
249 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
254 dcan1_pins: pinmux_dcan1_pins {
255 pinctrl-single,pins = <
256 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* (E17) uart0_rtsn.dcan1_rx */
257 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* (E18) uart0_ctsn.dcan1_tx */
258 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
264 pinctrl-names = "default";
265 pinctrl-0 = <&uart0_pins>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&uart1_pins>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&uart2_pins>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&uart4_pins>;
292 pinctrl-names = "default";
293 pinctrl-0 = <&uart5_pins>;
316 dr_mode = "peripheral";
317 interrupts-extended = <&intc 18 &tps 0>;
318 interrupt-names = "mc", "vbus";
331 pinctrl-names = "default";
332 pinctrl-0 = <&i2c0_pins>;
335 clock-frequency = <400000>;
341 baseboard_eeprom: baseboard_eeprom@50 {
342 compatible = "atmel,24c256";
345 #address-cells = <1>;
347 baseboard_data: baseboard_data@0 {
354 pinctrl-names = "default";
355 pinctrl-0 = <&i2c2_pins>;
358 clock-frequency = <400000>;
361 compatible = "invensense,mpu9250";
363 interrupt-parent = <&gpio3>;
364 interrupts = <21 IRQ_TYPE_EDGE_RISING>;
366 #address-cells = <1>;
369 compatible = "ak,ak8975";
376 compatible = "bosch,bmp280";
381 /include/ "tps65217.dtsi"
384 interrupts = <7>; /* NMI */
385 interrupt-parent = <&intc>;
388 interrupts = <0>, <1>;
389 interrupt-names = "USB", "AC";
399 dcdc1_reg: regulator@0 {
400 regulator-name = "vdds_dpr";
404 dcdc2_reg: regulator@1 {
405 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
406 regulator-name = "vdd_mpu";
407 regulator-min-microvolt = <925000>;
408 regulator-max-microvolt = <1351500>;
413 dcdc3_reg: regulator@2 {
414 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
415 regulator-name = "vdd_core";
416 regulator-min-microvolt = <925000>;
417 regulator-max-microvolt = <1150000>;
422 ldo1_reg: regulator@3 {
423 regulator-name = "vio,vrtc,vdds";
427 ldo2_reg: regulator@4 {
428 regulator-name = "vdd_3v3aux";
432 ldo3_reg: regulator@5 {
433 regulator-name = "vdd_1v8";
434 regulator-min-microvolt = <1800000>;
435 regulator-max-microvolt = <1800000>;
439 ldo4_reg: regulator@6 {
440 regulator-name = "vdd_3v3a";
448 vmmc-supply = <&vmmcsd_fixed>;
450 pinctrl-names = "default";
451 pinctrl-0 = <&mmc1_pins>;
452 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
457 vmmc-supply = <&vmmcsd_fixed>;
459 pinctrl-names = "default";
460 pinctrl-0 = <&mmc2_pins>;
464 dmas = <&edma_xbar 12 0 1
466 dma-names = "tx", "rx";
468 vmmc-supply = <&wlan_en_reg>;
472 ti,needs-special-hs-handling;
473 keep-power-in-suspend;
474 pinctrl-names = "default";
475 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
477 #address-cells = <1>;
480 compatible = "ti,wl1835";
482 interrupt-parent = <&gpio0>;
483 interrupts = <21 IRQ_TYPE_EDGE_RISING>;
490 ti,adc-channels = <0 1 2 3 4 5 6 7>;
495 pinctrl-names = "default";
496 pinctrl-0 = <&uart3_pins &bt_pins>;
500 compatible = "ti,wl1835-st";
501 enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
514 system-power-controller;
515 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
516 clock-names = "ext-clk", "int-clk";
520 pinctrl-names = "default";
521 pinctrl-0 = <&dcan1_pins>;
528 gpios = <10 GPIO_ACTIVE_HIGH>;
530 line-name = "LS_BUF_EN";