1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
77 default y if ARM64 && !POSITION_INDEPENDENT
79 config DMA_ADDR_T_64BIT
89 # Used for compatibility with asm files copied from the kernel
90 config ARM_ASM_UNIFIED
94 # Used for compatibility with asm files copied from the kernel
99 bool "Do not enable icache"
102 Do not enable instruction cache in U-Boot.
104 config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
107 default SYS_ICACHE_OFF
109 Do not enable instruction cache in SPL.
111 config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
115 Do not enable data cache in U-Boot.
117 config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
120 default SYS_DCACHE_OFF
122 Do not enable data cache in SPL.
124 config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
127 Select this if your processor suports enabling caches by using
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
138 bool 'Use the ARM v7 PMSA Compliant MPU'
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
146 # If set, the workarounds for these ARM errata are applied early during U-Boot
147 # startup. Note that in general these options force the workarounds to be
148 # applied; no CPU-type/version detection exists, unlike the similar options in
149 # the Linux kernel. Do not set these options unless they apply! Also note that
150 # the following can be machine-specific errata. These do have ability to
151 # provide rudimentary version and machine-specific checks, but expect no
153 # CONFIG_ARM_ERRATA_430973
154 # CONFIG_ARM_ERRATA_454179
155 # CONFIG_ARM_ERRATA_621766
156 # CONFIG_ARM_ERRATA_798870
157 # CONFIG_ARM_ERRATA_801819
158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
161 config ARM_ERRATA_430973
164 config ARM_ERRATA_454179
167 config ARM_ERRATA_621766
170 config ARM_ERRATA_716044
173 config ARM_ERRATA_725233
176 config ARM_ERRATA_742230
179 config ARM_ERRATA_743622
182 config ARM_ERRATA_751472
185 config ARM_ERRATA_761320
188 config ARM_ERRATA_773022
191 config ARM_ERRATA_774769
194 config ARM_ERRATA_794072
197 config ARM_ERRATA_798870
200 config ARM_ERRATA_801819
203 config ARM_ERRATA_826974
206 config ARM_ERRATA_828024
209 config ARM_ERRATA_829520
212 config ARM_ERRATA_833069
215 config ARM_ERRATA_833471
218 config ARM_ERRATA_845369
221 config ARM_ERRATA_852421
224 config ARM_ERRATA_852423
227 config ARM_ERRATA_855873
230 config ARM_CORTEX_A8_CVE_2017_5715
233 config ARM_CORTEX_A15_CVE_2017_5715
238 select SYS_CACHE_SHIFT_5
243 select SYS_CACHE_SHIFT_5
248 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
258 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_6
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
285 select SYS_ARM_CACHE_CP15
287 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
296 select SYS_CACHE_SHIFT_5
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
325 default 4 if CPU_SA1100
328 config SYS_CACHE_SHIFT_5
331 config SYS_CACHE_SHIFT_6
334 config SYS_CACHE_SHIFT_7
337 config SYS_CACHELINE_SIZE
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
344 bool "Enable ARCH_CPU_INIT"
346 Some architectures require a call to arch_cpu_init().
347 Say Y here to enable it
349 config SYS_ARCH_TIMER
350 bool "ARM Generic Timer support"
351 depends on CPU_V7A || ARM64
354 The ARM Generic Timer (aka arch-timer) provides an architected
355 interface to a timer source on an SoC.
356 It is mandatory for ARMv8 implementation and widely available
360 bool "Support for ARM SMC Calling Convention (SMCCC)"
361 depends on CPU_V7A || ARM64
364 Say Y here if you want to enable ARM SMC Calling Convention.
365 This should be enabled if U-Boot needs to communicate with system
366 firmware (for example, PSCI) according to SMCCC.
369 bool "support boot from semihosting"
371 In emulated environments, semihosting is a way for
372 the hosted environment to call out to the emulator to
373 retrieve files from the host machine.
375 config SYS_THUMB_BUILD
376 bool "Build U-Boot using the Thumb instruction set"
379 Use this flag to build U-Boot using the Thumb instruction set for
380 ARM architectures. Thumb instruction set provides better code
381 density. For ARM architectures that support Thumb2 this flag will
382 result in Thumb2 code generated by GCC.
384 config SPL_SYS_THUMB_BUILD
385 bool "Build SPL using the Thumb instruction set"
386 default y if SYS_THUMB_BUILD
387 depends on !ARM64 && SPL
389 Use this flag to build SPL using the Thumb instruction set for
390 ARM architectures. Thumb instruction set provides better code
391 density. For ARM architectures that support Thumb2 this flag will
392 result in Thumb2 code generated by GCC.
394 config TPL_SYS_THUMB_BUILD
395 bool "Build TPL using the Thumb instruction set"
396 default y if SYS_THUMB_BUILD
397 depends on TPL && !ARM64
399 Use this flag to build TPL using the Thumb instruction set for
400 ARM architectures. Thumb instruction set provides better code
401 density. For ARM architectures that support Thumb2 this flag will
402 result in Thumb2 code generated by GCC.
405 config SYS_L2CACHE_OFF
408 If SoC does not support L2CACHE or one does not want to enable
409 L2CACHE, choose this option.
411 config ENABLE_ARM_SOC_BOOT0_HOOK
412 bool "prepare BOOT0 header"
414 If the SoC's BOOT0 requires a header area filled with (magic)
415 values, then choose this option, and create a file included as
416 <asm/arch/boot0.h> which contains the required assembler code.
418 config ARM_CORTEX_CPU_IS_UP
422 config USE_ARCH_MEMCPY
423 bool "Use an assembly optimized implementation of memcpy"
427 Enable the generation of an optimized version of memcpy.
428 Such an implementation may be faster under some conditions
429 but may increase the binary size.
431 config SPL_USE_ARCH_MEMCPY
432 bool "Use an assembly optimized implementation of memcpy for SPL"
433 default y if USE_ARCH_MEMCPY
434 depends on !ARM64 && SPL
436 Enable the generation of an optimized version of memcpy.
437 Such an implementation may be faster under some conditions
438 but may increase the binary size.
440 config TPL_USE_ARCH_MEMCPY
441 bool "Use an assembly optimized implementation of memcpy for TPL"
442 default y if USE_ARCH_MEMCPY
443 depends on !ARM64 && TPL
445 Enable the generation of an optimized version of memcpy.
446 Such an implementation may be faster under some conditions
447 but may increase the binary size.
449 config USE_ARCH_MEMSET
450 bool "Use an assembly optimized implementation of memset"
454 Enable the generation of an optimized version of memset.
455 Such an implementation may be faster under some conditions
456 but may increase the binary size.
458 config SPL_USE_ARCH_MEMSET
459 bool "Use an assembly optimized implementation of memset for SPL"
460 default y if USE_ARCH_MEMSET
461 depends on !ARM64 && SPL
463 Enable the generation of an optimized version of memset.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
467 config TPL_USE_ARCH_MEMSET
468 bool "Use an assembly optimized implementation of memset for TPL"
469 default y if USE_ARCH_MEMSET
470 depends on !ARM64 && TPL
472 Enable the generation of an optimized version of memset.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
476 config SET_STACK_SIZE
477 bool "Enable an option to set max stack size that can be used"
478 default y if ARCH_VERSAL || ARCH_ZYNQMP
480 This will enable an option to set max stack size that can be
484 hex "Define max stack size that can be used by U-Boot"
485 depends on SET_STACK_SIZE
486 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
488 Define Max stack size that can be used by U-Boot so that the
489 initrd_high will be calculated as base stack pointer minus this
492 config ARM64_SUPPORT_AARCH32
493 bool "ARM64 system support AArch32 execution state"
495 default y if !TARGET_THUNDERX_88XX
497 This ARM64 system supports AArch32 execution state.
500 prompt "Target select"
505 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
507 config TARGET_EDB93XX
508 bool "Support edb93xx"
512 config TARGET_ASPENITE
513 bool "Support aspenite"
517 bool "Support gplugd"
525 Support for TI's DaVinci platform.
528 bool "Marvell Kirkwood"
529 select ARCH_MISC_INIT
530 select BOARD_EARLY_INIT_F
534 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
554 config TARGET_SPEAR300
555 bool "Support spear300"
556 select BOARD_EARLY_INIT_F
561 config TARGET_SPEAR310
562 bool "Support spear310"
563 select BOARD_EARLY_INIT_F
568 config TARGET_SPEAR320
569 bool "Support spear320"
570 select BOARD_EARLY_INIT_F
575 config TARGET_SPEAR600
576 bool "Support spear600"
577 select BOARD_EARLY_INIT_F
582 config TARGET_STV0991
583 bool "Support stv0991"
596 select BOARD_LATE_INIT
601 config TARGET_WOODBURN
602 bool "Support woodburn"
605 config TARGET_WOODBURN_SD
606 bool "Support woodburn_sd"
614 config TARGET_MX35PDK
615 bool "Support mx35pdk"
616 select BOARD_LATE_INIT
620 bool "Broadcom BCM283X family"
626 select SERIAL_SEARCH_ALL
631 bool "Broadcom BCM63158 family"
637 bool "Broadcom BCM68360 family"
643 bool "Broadcom BCM6858 family"
648 config TARGET_VEXPRESS_CA15_TC2
649 bool "Support vexpress_ca15_tc2"
651 select CPU_V7_HAS_NONSEC
652 select CPU_V7_HAS_VIRT
656 bool "Broadcom BCM7XXX family"
660 select OF_PRIOR_STAGE
663 This enables support for Broadcom ARM-based set-top box
664 chipsets, including the 7445 family of chips.
666 config TARGET_VEXPRESS_CA5X2
667 bool "Support vexpress_ca5x2"
671 config TARGET_VEXPRESS_CA9X4
672 bool "Support vexpress_ca9x4"
676 config TARGET_BCM23550_W1D
677 bool "Support bcm23550_w1d"
682 config TARGET_BCM28155_AP
683 bool "Support bcm28155_ap"
688 config TARGET_BCMCYGNUS
689 bool "Support bcmcygnus"
692 imply BCM_SF2_ETH_GMAC
700 bool "Support bcmnsp"
704 bool "Support Broadcom Northstar2"
707 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
708 ARMv8 Cortex-A57 processors targeting a broad range of networking
712 bool "Samsung EXYNOS"
721 imply SYS_THUMB_BUILD
726 bool "Samsung S5PC1XX"
735 bool "Calxeda Highbank"
739 config ARCH_INTEGRATOR
740 bool "ARM Ltd. Integrator family"
751 select SYS_ARCH_TIMER
752 select SYS_THUMB_BUILD
758 bool "Texas Instruments' K3 Architecture"
763 config ARCH_OMAP2PLUS
766 select SPL_BOARD_INIT if SPL
767 select SPL_STACK_R if SPL
773 imply DISTRO_DEFAULTS
775 Support for the Meson SoC family developed by Amlogic Inc.,
776 targeted at media players and tablet computers. We currently
777 support the S905 (GXBaby) 64-bit SoC.
785 select SPL_LIBCOMMON_SUPPORT if SPL
786 select SPL_LIBGENERIC_SUPPORT if SPL
787 select SPL_OF_CONTROL if SPL
790 Support for the MediaTek SoCs family developed by MediaTek Inc.
791 Please refer to doc/README.mediatek for more information.
794 bool "NXP LPC32xx platform"
804 bool "NXP i.MX8 platform"
808 select ENABLE_ARM_SOC_BOOT0_HOOK
811 bool "NXP i.MX8M platform"
818 bool "NXP i.MXRT platform"
826 bool "NXP i.MX23 family"
837 bool "NXP i.MX28 family"
843 bool "NXP i.MX31 family"
849 select ROM_UNIFIED_SECTIONS
851 imply SYS_THUMB_BUILD
855 select ARCH_MISC_INIT
856 select BOARD_EARLY_INIT_F
858 select SYS_FSL_HAS_SEC if IMX_HAB
859 select SYS_FSL_SEC_COMPAT_4
860 select SYS_FSL_SEC_LE
862 imply SYS_THUMB_BUILD
867 select SYS_FSL_HAS_SEC if IMX_HAB
868 select SYS_FSL_SEC_COMPAT_4
869 select SYS_FSL_SEC_LE
871 imply SYS_THUMB_BUILD
875 default "arch/arm/mach-omap2/u-boot-spl.lds"
880 select BOARD_EARLY_INIT_F
885 bool "Actions Semi OWL SoCs"
893 bool "QEMU Virtual Platform"
894 select ARCH_SUPPORT_TFABOOT
904 bool "Renesas ARM SoCs"
905 select BOARD_EARLY_INIT_F if !RZA1
910 imply SYS_THUMB_BUILD
911 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
913 config TARGET_S32V234EVB
914 bool "Support s32v234evb"
916 select SYS_FSL_ERRATUM_ESDHC111
918 config ARCH_SNAPDRAGON
919 bool "Qualcomm Snapdragon SoCs"
932 bool "Altera SOCFPGA family"
933 select ARCH_EARLY_INIT_R
934 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
935 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
936 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
939 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
941 select SPL_DM_RESET if DM_RESET
943 select SPL_LIBCOMMON_SUPPORT
944 select SPL_LIBGENERIC_SUPPORT
945 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
946 select SPL_OF_CONTROL
947 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
948 select SPL_SERIAL_SUPPORT
950 select SPL_WATCHDOG_SUPPORT
953 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
955 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
956 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
965 imply SPL_LIBDISK_SUPPORT
966 imply SPL_MMC_SUPPORT
967 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
968 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
969 imply SPL_SPI_FLASH_SUPPORT
970 imply SPL_SPI_SUPPORT
974 bool "Support sunxi (Allwinner) SoCs"
977 select CMD_MMC if MMC
978 select CMD_USB if DISTRO_DEFAULTS
985 select DM_SCSI if SCSI
987 select DM_USB if DISTRO_DEFAULTS
988 select OF_BOARD_SETUP
991 select SPECIFY_CONSOLE_INDEX
992 select SPL_STACK_R if SPL
993 select SPL_SYS_MALLOC_SIMPLE if SPL
994 select SPL_SYS_THUMB_BUILD if !ARM64
997 select SYS_THUMB_BUILD if !ARM64
998 select USB if DISTRO_DEFAULTS
999 select USB_KEYBOARD if DISTRO_DEFAULTS
1000 select USB_STORAGE if DISTRO_DEFAULTS
1001 select SPL_USE_TINY_PRINTF
1004 imply CMD_UBI if MTD_RAW_NAND
1005 imply DISTRO_DEFAULTS
1008 imply OF_LIBFDT_OVERLAY
1009 imply PRE_CONSOLE_BUFFER
1010 imply SPL_GPIO_SUPPORT
1011 imply SPL_LIBCOMMON_SUPPORT
1012 imply SPL_LIBGENERIC_SUPPORT
1013 imply SPL_MMC_SUPPORT if MMC
1014 imply SPL_POWER_SUPPORT
1015 imply SPL_SERIAL_SUPPORT
1019 bool "ST-Ericsson U8500 Series"
1023 select DM_MMC if MMC
1025 select DM_USB if USB
1029 imply ARM_PL180_MMCI
1031 imply NOMADIK_MTU_TIMER
1034 imply SYSRESET_SYSCON
1037 bool "Support Xilinx Versal Platform"
1041 select DM_ETH if NET
1042 select DM_MMC if MMC
1045 imply BOARD_LATE_INIT
1048 bool "Freescale Vybrid"
1050 select SYS_FSL_ERRATUM_ESDHC111
1055 bool "Xilinx Zynq based platform"
1060 select DM_ETH if NET
1061 select DM_MMC if MMC
1065 select DM_USB if USB
1068 select SPL_BOARD_INIT if SPL
1069 select SPL_CLK if SPL
1070 select SPL_DM if SPL
1071 select SPL_OF_CONTROL if SPL
1072 select SPL_SEPARATE_BSS if SPL
1074 imply ARCH_EARLY_INIT_R
1075 imply BOARD_LATE_INIT
1081 config ARCH_ZYNQMP_R5
1082 bool "Xilinx ZynqMP R5 based platform"
1086 select DM_ETH if NET
1087 select DM_MMC if MMC
1094 bool "Xilinx ZynqMP based platform"
1098 select DM_ETH if NET
1100 select DM_MMC if MMC
1102 select DM_SPI if SPI
1103 select DM_SPI_FLASH if DM_SPI
1104 select DM_USB if USB
1107 select SPL_BOARD_INIT if SPL
1108 select SPL_CLK if SPL
1109 select SPL_DM_MAILBOX if SPL
1110 select SPL_FIRMWARE if SPL
1111 select SPL_SEPARATE_BSS if SPL
1114 imply BOARD_LATE_INIT
1122 imply DISTRO_DEFAULTS
1125 config TARGET_VEXPRESS64_AEMV8A
1126 bool "Support vexpress_aemv8a"
1130 config TARGET_VEXPRESS64_BASE_FVP
1131 bool "Support Versatile Express ARMv8a FVP BASE model"
1136 config TARGET_VEXPRESS64_JUNO
1137 bool "Support Versatile Express Juno Development Platform"
1141 config TARGET_LS2080A_EMU
1142 bool "Support ls2080a_emu"
1145 select ARMV8_MULTIENTRY
1146 select FSL_DDR_SYNC_REFRESH
1148 Support for Freescale LS2080A_EMU platform.
1149 The LS2080A Development System (EMULATOR) is a pre-silicon
1150 development platform that supports the QorIQ LS2080A
1151 Layerscape Architecture processor.
1153 config TARGET_LS2080A_SIMU
1154 bool "Support ls2080a_simu"
1157 select ARMV8_MULTIENTRY
1158 select BOARD_LATE_INIT
1160 Support for Freescale LS2080A_SIMU platform.
1161 The LS2080A Development System (QDS) is a pre silicon
1162 development platform that supports the QorIQ LS2080A
1163 Layerscape Architecture processor.
1165 config TARGET_LS1088AQDS
1166 bool "Support ls1088aqds"
1168 select ARCH_MISC_INIT
1170 select ARMV8_MULTIENTRY
1171 select ARCH_SUPPORT_TFABOOT
1172 select BOARD_LATE_INIT
1174 select FSL_DDR_INTERACTIVE if !SD_BOOT
1176 Support for NXP LS1088AQDS platform.
1177 The LS1088A Development System (QDS) is a high-performance
1178 development platform that supports the QorIQ LS1088A
1179 Layerscape Architecture processor.
1181 config TARGET_LS2080AQDS
1182 bool "Support ls2080aqds"
1185 select ARMV8_MULTIENTRY
1186 select ARCH_SUPPORT_TFABOOT
1187 select BOARD_LATE_INIT
1192 select FSL_DDR_INTERACTIVE if !SPL
1194 Support for Freescale LS2080AQDS platform.
1195 The LS2080A Development System (QDS) is a high-performance
1196 development platform that supports the QorIQ LS2080A
1197 Layerscape Architecture processor.
1199 config TARGET_LS2080ARDB
1200 bool "Support ls2080ardb"
1203 select ARMV8_MULTIENTRY
1204 select ARCH_SUPPORT_TFABOOT
1205 select BOARD_LATE_INIT
1208 select FSL_DDR_INTERACTIVE if !SPL
1212 Support for Freescale LS2080ARDB platform.
1213 The LS2080A Reference design board (RDB) is a high-performance
1214 development platform that supports the QorIQ LS2080A
1215 Layerscape Architecture processor.
1217 config TARGET_LS2081ARDB
1218 bool "Support ls2081ardb"
1221 select ARMV8_MULTIENTRY
1222 select BOARD_LATE_INIT
1225 Support for Freescale LS2081ARDB platform.
1226 The LS2081A Reference design board (RDB) is a high-performance
1227 development platform that supports the QorIQ LS2081A/LS2041A
1228 Layerscape Architecture processor.
1230 config TARGET_LX2160ARDB
1231 bool "Support lx2160ardb"
1234 select ARMV8_MULTIENTRY
1235 select ARCH_SUPPORT_TFABOOT
1236 select BOARD_LATE_INIT
1238 Support for NXP LX2160ARDB platform.
1239 The lx2160ardb (LX2160A Reference design board (RDB)
1240 is a high-performance development platform that supports the
1241 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1243 config TARGET_LX2160AQDS
1244 bool "Support lx2160aqds"
1247 select ARMV8_MULTIENTRY
1248 select ARCH_SUPPORT_TFABOOT
1249 select BOARD_LATE_INIT
1251 Support for NXP LX2160AQDS platform.
1252 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1253 is a high-performance development platform that supports the
1254 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1257 bool "Support HiKey 96boards Consumer Edition Platform"
1264 select SPECIFY_CONSOLE_INDEX
1267 Support for HiKey 96boards platform. It features a HI6220
1268 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1270 config TARGET_HIKEY960
1271 bool "Support HiKey960 96boards Consumer Edition Platform"
1279 Support for HiKey960 96boards platform. It features a HI3660
1280 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1282 config TARGET_POPLAR
1283 bool "Support Poplar 96boards Enterprise Edition Platform"
1292 Support for Poplar 96boards EE platform. It features a HI3798cv200
1293 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1294 making it capable of running any commercial set-top solution based on
1297 config TARGET_LS1012AQDS
1298 bool "Support ls1012aqds"
1301 select ARCH_SUPPORT_TFABOOT
1302 select BOARD_LATE_INIT
1304 Support for Freescale LS1012AQDS platform.
1305 The LS1012A Development System (QDS) is a high-performance
1306 development platform that supports the QorIQ LS1012A
1307 Layerscape Architecture processor.
1309 config TARGET_LS1012ARDB
1310 bool "Support ls1012ardb"
1313 select ARCH_SUPPORT_TFABOOT
1314 select BOARD_LATE_INIT
1318 Support for Freescale LS1012ARDB platform.
1319 The LS1012A Reference design board (RDB) is a high-performance
1320 development platform that supports the QorIQ LS1012A
1321 Layerscape Architecture processor.
1323 config TARGET_LS1012A2G5RDB
1324 bool "Support ls1012a2g5rdb"
1327 select ARCH_SUPPORT_TFABOOT
1328 select BOARD_LATE_INIT
1331 Support for Freescale LS1012A2G5RDB platform.
1332 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1333 development platform that supports the QorIQ LS1012A
1334 Layerscape Architecture processor.
1336 config TARGET_LS1012AFRWY
1337 bool "Support ls1012afrwy"
1340 select ARCH_SUPPORT_TFABOOT
1341 select BOARD_LATE_INIT
1345 Support for Freescale LS1012AFRWY platform.
1346 The LS1012A FRWY board (FRWY) is a high-performance
1347 development platform that supports the QorIQ LS1012A
1348 Layerscape Architecture processor.
1350 config TARGET_LS1012AFRDM
1351 bool "Support ls1012afrdm"
1354 select ARCH_SUPPORT_TFABOOT
1356 Support for Freescale LS1012AFRDM platform.
1357 The LS1012A Freedom board (FRDM) is a high-performance
1358 development platform that supports the QorIQ LS1012A
1359 Layerscape Architecture processor.
1361 config TARGET_LS1028AQDS
1362 bool "Support ls1028aqds"
1365 select ARMV8_MULTIENTRY
1366 select ARCH_SUPPORT_TFABOOT
1367 select BOARD_LATE_INIT
1368 select ARCH_MISC_INIT
1370 Support for Freescale LS1028AQDS platform
1371 The LS1028A Development System (QDS) is a high-performance
1372 development platform that supports the QorIQ LS1028A
1373 Layerscape Architecture processor.
1375 config TARGET_LS1028ARDB
1376 bool "Support ls1028ardb"
1379 select ARMV8_MULTIENTRY
1380 select ARCH_SUPPORT_TFABOOT
1382 Support for Freescale LS1028ARDB platform
1383 The LS1028A Development System (RDB) is a high-performance
1384 development platform that supports the QorIQ LS1028A
1385 Layerscape Architecture processor.
1387 config TARGET_LS1088ARDB
1388 bool "Support ls1088ardb"
1390 select ARCH_MISC_INIT
1392 select ARMV8_MULTIENTRY
1393 select ARCH_SUPPORT_TFABOOT
1394 select BOARD_LATE_INIT
1396 select FSL_DDR_INTERACTIVE if !SD_BOOT
1398 Support for NXP LS1088ARDB platform.
1399 The LS1088A Reference design board (RDB) is a high-performance
1400 development platform that supports the QorIQ LS1088A
1401 Layerscape Architecture processor.
1403 config TARGET_LS1021AQDS
1404 bool "Support ls1021aqds"
1406 select ARCH_SUPPORT_PSCI
1407 select BOARD_EARLY_INIT_F
1408 select BOARD_LATE_INIT
1410 select CPU_V7_HAS_NONSEC
1411 select CPU_V7_HAS_VIRT
1412 select LS1_DEEP_SLEEP
1415 select FSL_DDR_INTERACTIVE
1418 config TARGET_LS1021ATWR
1419 bool "Support ls1021atwr"
1421 select ARCH_SUPPORT_PSCI
1422 select BOARD_EARLY_INIT_F
1423 select BOARD_LATE_INIT
1425 select CPU_V7_HAS_NONSEC
1426 select CPU_V7_HAS_VIRT
1427 select LS1_DEEP_SLEEP
1431 config TARGET_LS1021ATSN
1432 bool "Support ls1021atsn"
1434 select ARCH_SUPPORT_PSCI
1435 select BOARD_EARLY_INIT_F
1436 select BOARD_LATE_INIT
1438 select CPU_V7_HAS_NONSEC
1439 select CPU_V7_HAS_VIRT
1440 select LS1_DEEP_SLEEP
1444 config TARGET_LS1021AIOT
1445 bool "Support ls1021aiot"
1447 select ARCH_SUPPORT_PSCI
1448 select BOARD_LATE_INIT
1450 select CPU_V7_HAS_NONSEC
1451 select CPU_V7_HAS_VIRT
1455 Support for Freescale LS1021AIOT platform.
1456 The LS1021A Freescale board (IOT) is a high-performance
1457 development platform that supports the QorIQ LS1021A
1458 Layerscape Architecture processor.
1460 config TARGET_LS1043AQDS
1461 bool "Support ls1043aqds"
1464 select ARMV8_MULTIENTRY
1465 select ARCH_SUPPORT_TFABOOT
1466 select BOARD_EARLY_INIT_F
1467 select BOARD_LATE_INIT
1469 select FSL_DDR_INTERACTIVE if !SPL
1473 Support for Freescale LS1043AQDS platform.
1475 config TARGET_LS1043ARDB
1476 bool "Support ls1043ardb"
1479 select ARMV8_MULTIENTRY
1480 select ARCH_SUPPORT_TFABOOT
1481 select BOARD_EARLY_INIT_F
1482 select BOARD_LATE_INIT
1485 Support for Freescale LS1043ARDB platform.
1487 config TARGET_LS1046AQDS
1488 bool "Support ls1046aqds"
1491 select ARMV8_MULTIENTRY
1492 select ARCH_SUPPORT_TFABOOT
1493 select BOARD_EARLY_INIT_F
1494 select BOARD_LATE_INIT
1495 select DM_SPI_FLASH if DM_SPI
1497 select FSL_DDR_BIST if !SPL
1498 select FSL_DDR_INTERACTIVE if !SPL
1499 select FSL_DDR_INTERACTIVE if !SPL
1502 Support for Freescale LS1046AQDS platform.
1503 The LS1046A Development System (QDS) is a high-performance
1504 development platform that supports the QorIQ LS1046A
1505 Layerscape Architecture processor.
1507 config TARGET_LS1046ARDB
1508 bool "Support ls1046ardb"
1511 select ARMV8_MULTIENTRY
1512 select ARCH_SUPPORT_TFABOOT
1513 select BOARD_EARLY_INIT_F
1514 select BOARD_LATE_INIT
1515 select DM_SPI_FLASH if DM_SPI
1516 select POWER_MC34VR500
1519 select FSL_DDR_INTERACTIVE if !SPL
1522 Support for Freescale LS1046ARDB platform.
1523 The LS1046A Reference Design Board (RDB) is a high-performance
1524 development platform that supports the QorIQ LS1046A
1525 Layerscape Architecture processor.
1527 config TARGET_LS1046AFRWY
1528 bool "Support ls1046afrwy"
1531 select ARMV8_MULTIENTRY
1532 select ARCH_SUPPORT_TFABOOT
1533 select BOARD_EARLY_INIT_F
1534 select BOARD_LATE_INIT
1535 select DM_SPI_FLASH if DM_SPI
1538 Support for Freescale LS1046AFRWY platform.
1539 The LS1046A Freeway Board (FRWY) is a high-performance
1540 development platform that supports the QorIQ LS1046A
1541 Layerscape Architecture processor.
1543 config TARGET_COLIBRI_PXA270
1544 bool "Support colibri_pxa270"
1547 config ARCH_UNIPHIER
1548 bool "Socionext UniPhier SoCs"
1549 select BOARD_LATE_INIT
1557 select OF_BOARD_SETUP
1561 select SPL_BOARD_INIT if SPL
1562 select SPL_DM if SPL
1563 select SPL_LIBCOMMON_SUPPORT if SPL
1564 select SPL_LIBGENERIC_SUPPORT if SPL
1565 select SPL_OF_CONTROL if SPL
1566 select SPL_PINCTRL if SPL
1569 imply DISTRO_DEFAULTS
1572 Support for UniPhier SoC family developed by Socionext Inc.
1573 (formerly, System LSI Business Division of Panasonic Corporation)
1576 bool "Support STMicroelectronics STM32 MCU with cortex M"
1583 bool "Support STMicrolectronics SoCs"
1592 Support for STMicroelectronics STiH407/10 SoC family.
1593 This SoC is used on Linaro 96Board STiH410-B2260
1596 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1597 select ARCH_MISC_INIT
1598 select BOARD_LATE_INIT
1607 select OF_SYSTEM_SETUP
1613 select SYS_THUMB_BUILD
1617 imply OF_LIBFDT_OVERLAY
1618 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1621 Support for STM32MP SoC family developed by STMicroelectronics,
1622 MPUs based on ARM cortex A core
1623 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1624 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1626 SPL is the unsecure FSBL for the basic boot chain.
1628 config ARCH_ROCKCHIP
1629 bool "Support Rockchip SoCs"
1640 select DM_USB if USB
1641 select ENABLE_ARM_SOC_BOOT0_HOOK
1644 select SPL_DM if SPL
1646 select SYS_THUMB_BUILD if !ARM64
1649 imply DEBUG_UART_BOARD_INIT
1650 imply DISTRO_DEFAULTS
1652 imply SARADC_ROCKCHIP
1654 imply SPL_SYS_MALLOC_SIMPLE
1657 imply USB_FUNCTION_FASTBOOT
1659 config TARGET_THUNDERX_88XX
1660 bool "Support ThunderX 88xx"
1664 select SYS_CACHE_SHIFT_7
1667 bool "Support Aspeed SoCs"
1672 config TARGET_DURIAN
1673 bool "Support Phytium Durian Platform"
1676 Support for durian platform.
1677 It has 2GB Sdram, uart and pcie.
1681 config ARCH_SUPPORT_TFABOOT
1685 bool "Support for booting from TF-A"
1686 depends on ARCH_SUPPORT_TFABOOT
1689 Enabling this will make a U-Boot binary that is capable of being
1690 booted via TF-A (Trusted Firmware for Cortex-A).
1692 config TI_SECURE_DEVICE
1693 bool "HS Device Type Support"
1694 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1696 If a high secure (HS) device type is being used, this config
1697 must be set. This option impacts various aspects of the
1698 build system (to create signed boot images that can be
1699 authenticated) and the code. See the doc/README.ti-secure
1700 file for further details.
1702 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1703 config ISW_ENTRY_ADDR
1704 hex "Address in memory or XIP address of bootloader entry point"
1705 default 0x402F4000 if AM43XX
1706 default 0x402F0400 if AM33XX
1707 default 0x40301350 if OMAP54XX
1709 After any reset, the boot ROM searches the boot media for a valid
1710 boot image. For non-XIP devices, the ROM then copies the image into
1711 internal memory. For all boot modes, after the ROM processes the
1712 boot image it eventually computes the entry point address depending
1713 on the device type (secure/non-secure), boot media (xip/non-xip) and
1717 source "arch/arm/mach-aspeed/Kconfig"
1719 source "arch/arm/mach-at91/Kconfig"
1721 source "arch/arm/mach-bcm283x/Kconfig"
1723 source "arch/arm/mach-bcmstb/Kconfig"
1725 source "arch/arm/mach-davinci/Kconfig"
1727 source "arch/arm/mach-exynos/Kconfig"
1729 source "arch/arm/mach-highbank/Kconfig"
1731 source "arch/arm/mach-integrator/Kconfig"
1733 source "arch/arm/mach-k3/Kconfig"
1735 source "arch/arm/mach-keystone/Kconfig"
1737 source "arch/arm/mach-kirkwood/Kconfig"
1739 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1741 source "arch/arm/mach-mvebu/Kconfig"
1743 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1745 source "arch/arm/mach-imx/mx2/Kconfig"
1747 source "arch/arm/mach-imx/mx3/Kconfig"
1749 source "arch/arm/mach-imx/mx5/Kconfig"
1751 source "arch/arm/mach-imx/mx6/Kconfig"
1753 source "arch/arm/mach-imx/mx7/Kconfig"
1755 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1757 source "arch/arm/mach-imx/imx8/Kconfig"
1759 source "arch/arm/mach-imx/imx8m/Kconfig"
1761 source "arch/arm/mach-imx/imxrt/Kconfig"
1763 source "arch/arm/mach-imx/mxs/Kconfig"
1765 source "arch/arm/mach-omap2/Kconfig"
1767 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1769 source "arch/arm/mach-orion5x/Kconfig"
1771 source "arch/arm/mach-owl/Kconfig"
1773 source "arch/arm/mach-rmobile/Kconfig"
1775 source "arch/arm/mach-meson/Kconfig"
1777 source "arch/arm/mach-mediatek/Kconfig"
1779 source "arch/arm/mach-qemu/Kconfig"
1781 source "arch/arm/mach-rockchip/Kconfig"
1783 source "arch/arm/mach-s5pc1xx/Kconfig"
1785 source "arch/arm/mach-snapdragon/Kconfig"
1787 source "arch/arm/mach-socfpga/Kconfig"
1789 source "arch/arm/mach-sti/Kconfig"
1791 source "arch/arm/mach-stm32/Kconfig"
1793 source "arch/arm/mach-stm32mp/Kconfig"
1795 source "arch/arm/mach-sunxi/Kconfig"
1797 source "arch/arm/mach-tegra/Kconfig"
1799 source "arch/arm/mach-u8500/Kconfig"
1801 source "arch/arm/mach-uniphier/Kconfig"
1803 source "arch/arm/cpu/armv7/vf610/Kconfig"
1805 source "arch/arm/mach-zynq/Kconfig"
1807 source "arch/arm/mach-zynqmp/Kconfig"
1809 source "arch/arm/mach-versal/Kconfig"
1811 source "arch/arm/mach-zynqmp-r5/Kconfig"
1813 source "arch/arm/cpu/armv7/Kconfig"
1815 source "arch/arm/cpu/armv8/Kconfig"
1817 source "arch/arm/mach-imx/Kconfig"
1819 source "board/bosch/shc/Kconfig"
1820 source "board/bosch/guardian/Kconfig"
1821 source "board/CarMediaLab/flea3/Kconfig"
1822 source "board/Marvell/aspenite/Kconfig"
1823 source "board/Marvell/gplugd/Kconfig"
1824 source "board/armadeus/apf27/Kconfig"
1825 source "board/armltd/vexpress/Kconfig"
1826 source "board/armltd/vexpress64/Kconfig"
1827 source "board/broadcom/bcm23550_w1d/Kconfig"
1828 source "board/broadcom/bcm28155_ap/Kconfig"
1829 source "board/broadcom/bcm963158/Kconfig"
1830 source "board/broadcom/bcm968360bg/Kconfig"
1831 source "board/broadcom/bcm968580xref/Kconfig"
1832 source "board/broadcom/bcmcygnus/Kconfig"
1833 source "board/broadcom/bcmnsp/Kconfig"
1834 source "board/broadcom/bcmns2/Kconfig"
1835 source "board/cavium/thunderx/Kconfig"
1836 source "board/cirrus/edb93xx/Kconfig"
1837 source "board/eets/pdu001/Kconfig"
1838 source "board/emulation/qemu-arm/Kconfig"
1839 source "board/freescale/ls2080a/Kconfig"
1840 source "board/freescale/ls2080aqds/Kconfig"
1841 source "board/freescale/ls2080ardb/Kconfig"
1842 source "board/freescale/ls1088a/Kconfig"
1843 source "board/freescale/ls1028a/Kconfig"
1844 source "board/freescale/ls1021aqds/Kconfig"
1845 source "board/freescale/ls1043aqds/Kconfig"
1846 source "board/freescale/ls1021atwr/Kconfig"
1847 source "board/freescale/ls1021atsn/Kconfig"
1848 source "board/freescale/ls1021aiot/Kconfig"
1849 source "board/freescale/ls1046aqds/Kconfig"
1850 source "board/freescale/ls1043ardb/Kconfig"
1851 source "board/freescale/ls1046ardb/Kconfig"
1852 source "board/freescale/ls1046afrwy/Kconfig"
1853 source "board/freescale/ls1012aqds/Kconfig"
1854 source "board/freescale/ls1012ardb/Kconfig"
1855 source "board/freescale/ls1012afrdm/Kconfig"
1856 source "board/freescale/lx2160a/Kconfig"
1857 source "board/freescale/mx35pdk/Kconfig"
1858 source "board/freescale/s32v234evb/Kconfig"
1859 source "board/grinn/chiliboard/Kconfig"
1860 source "board/gumstix/pepper/Kconfig"
1861 source "board/hisilicon/hikey/Kconfig"
1862 source "board/hisilicon/hikey960/Kconfig"
1863 source "board/hisilicon/poplar/Kconfig"
1864 source "board/isee/igep003x/Kconfig"
1865 source "board/phytec/pcm051/Kconfig"
1866 source "board/silica/pengwyn/Kconfig"
1867 source "board/spear/spear300/Kconfig"
1868 source "board/spear/spear310/Kconfig"
1869 source "board/spear/spear320/Kconfig"
1870 source "board/spear/spear600/Kconfig"
1871 source "board/spear/x600/Kconfig"
1872 source "board/st/stv0991/Kconfig"
1873 source "board/tcl/sl50/Kconfig"
1874 source "board/ucRobotics/bubblegum_96/Kconfig"
1875 source "board/birdland/bav335x/Kconfig"
1876 source "board/toradex/colibri_pxa270/Kconfig"
1877 source "board/variscite/dart_6ul/Kconfig"
1878 source "board/vscom/baltos/Kconfig"
1879 source "board/woodburn/Kconfig"
1880 source "board/xilinx/Kconfig"
1881 source "board/xilinx/zynq/Kconfig"
1882 source "board/xilinx/zynqmp/Kconfig"
1883 source "board/phytium/durian/Kconfig"
1885 source "arch/arm/Kconfig.debug"
1890 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1891 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1892 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64