1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
333 bool "Enable ARCH_CPU_INIT"
335 Some architectures require a call to arch_cpu_init()
336 Say Y here to enable it
338 config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
340 depends on CPU_V7A || ARM64
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandantory for ARMv8 implementation and widely available
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
350 depends on CPU_V7A || ARM64
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
358 bool "support boot from semihosting"
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
364 config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
373 config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
376 depends on !ARM64 && SPL
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
394 config SYS_L2CACHE_OFF
397 If SoC does not support L2CACHE or one do not want to enable
398 L2CACHE, choose this option.
400 config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
403 If the SoC's BOOT0 requires a header area filled with (magic)
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
407 config ARM_CORTEX_CPU_IS_UP
411 config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
416 Enable the generation of an optimized version of memcpy.
417 Such implementation may be faster under some conditions
418 but may increase the binary size.
420 config SPL_USE_ARCH_MEMCPY
421 bool "Use an assembly optimized implementation of memcpy for SPL"
422 default y if USE_ARCH_MEMCPY
423 depends on !ARM64 && SPL
425 Enable the generation of an optimized version of memcpy.
426 Such implementation may be faster under some conditions
427 but may increase the binary size.
429 config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
432 depends on !ARM64 && TPL
434 Enable the generation of an optimized version of memcpy.
435 Such implementation may be faster under some conditions
436 but may increase the binary size.
438 config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
443 Enable the generation of an optimized version of memset.
444 Such implementation may be faster under some conditions
445 but may increase the binary size.
447 config SPL_USE_ARCH_MEMSET
448 bool "Use an assembly optimized implementation of memset for SPL"
449 default y if USE_ARCH_MEMSET
450 depends on !ARM64 && SPL
452 Enable the generation of an optimized version of memset.
453 Such implementation may be faster under some conditions
454 but may increase the binary size.
456 config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
459 depends on !ARM64 && TPL
461 Enable the generation of an optimized version of memset.
462 Such implementation may be faster under some conditions
463 but may increase the binary size.
465 config ARM64_SUPPORT_AARCH32
466 bool "ARM64 system support AArch32 execution state"
468 default y if !TARGET_THUNDERX_88XX
470 This ARM64 system supports AArch32 execution state.
473 prompt "Target select"
478 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
480 config TARGET_EDB93XX
481 bool "Support edb93xx"
485 config TARGET_ASPENITE
486 bool "Support aspenite"
490 bool "Support gplugd"
498 Support for TI's DaVinci platform.
501 bool "Marvell Kirkwood"
502 select ARCH_MISC_INIT
503 select BOARD_EARLY_INIT_F
507 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
527 config TARGET_SPEAR300
528 bool "Support spear300"
529 select BOARD_EARLY_INIT_F
534 config TARGET_SPEAR310
535 bool "Support spear310"
536 select BOARD_EARLY_INIT_F
541 config TARGET_SPEAR320
542 bool "Support spear320"
543 select BOARD_EARLY_INIT_F
548 config TARGET_SPEAR600
549 bool "Support spear600"
550 select BOARD_EARLY_INIT_F
555 config TARGET_STV0991
556 bool "Support stv0991"
569 select BOARD_LATE_INIT
574 config TARGET_WOODBURN
575 bool "Support woodburn"
578 config TARGET_WOODBURN_SD
579 bool "Support woodburn_sd"
587 config TARGET_MX35PDK
588 bool "Support mx35pdk"
589 select BOARD_LATE_INIT
593 bool "Broadcom BCM283X family"
599 select SERIAL_SEARCH_ALL
604 bool "Broadcom BCM63158 family"
610 bool "Broadcom BCM6858 family"
615 config TARGET_VEXPRESS_CA15_TC2
616 bool "Support vexpress_ca15_tc2"
618 select CPU_V7_HAS_NONSEC
619 select CPU_V7_HAS_VIRT
623 bool "Broadcom BCM7XXX family"
627 select OF_PRIOR_STAGE
630 This enables support for Broadcom ARM-based set-top box
631 chipsets, including the 7445 family of chips.
633 config TARGET_VEXPRESS_CA5X2
634 bool "Support vexpress_ca5x2"
638 config TARGET_VEXPRESS_CA9X4
639 bool "Support vexpress_ca9x4"
643 config TARGET_BCM23550_W1D
644 bool "Support bcm23550_w1d"
649 config TARGET_BCM28155_AP
650 bool "Support bcm28155_ap"
655 config TARGET_BCMCYGNUS
656 bool "Support bcmcygnus"
659 imply BCM_SF2_ETH_GMAC
667 bool "Support bcmnsp"
671 bool "Support Broadcom Northstar2"
674 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
675 ARMv8 Cortex-A57 processors targeting a broad range of networking
679 bool "Samsung EXYNOS"
688 imply SYS_THUMB_BUILD
693 bool "Samsung S5PC1XX"
702 bool "Calxeda Highbank"
706 config ARCH_INTEGRATOR
707 bool "ARM Ltd. Integrator family"
718 select SYS_ARCH_TIMER
719 select SYS_THUMB_BUILD
725 bool "Texas Instruments' K3 Architecture"
730 config ARCH_OMAP2PLUS
733 select SPL_BOARD_INIT if SPL
734 select SPL_STACK_R if SPL
740 imply DISTRO_DEFAULTS
742 Support for the Meson SoC family developed by Amlogic Inc.,
743 targeted at media players and tablet computers. We currently
744 support the S905 (GXBaby) 64-bit SoC.
752 select SPL_LIBCOMMON_SUPPORT if SPL
753 select SPL_LIBGENERIC_SUPPORT if SPL
754 select SPL_OF_CONTROL if SPL
757 Support for the MediaTek SoCs family developed by MediaTek Inc.
758 Please refer to doc/README.mediatek for more information.
761 bool "NXP LPC32xx platform"
771 bool "NXP i.MX8 platform"
777 bool "NXP i.MX8M platform"
784 bool "NXP i.MX23 family"
795 bool "NXP i.MX28 family"
801 bool "NXP i.MX31 family"
807 select ROM_UNIFIED_SECTIONS
812 select ARCH_MISC_INIT
813 select BOARD_EARLY_INIT_F
815 select SYS_FSL_HAS_SEC if SECURE_BOOT
816 select SYS_FSL_SEC_COMPAT_4
817 select SYS_FSL_SEC_LE
823 select SYS_FSL_HAS_SEC if SECURE_BOOT
824 select SYS_FSL_SEC_COMPAT_4
825 select SYS_FSL_SEC_LE
826 select SYS_THUMB_BUILD if SPL
831 default "arch/arm/mach-omap2/u-boot-spl.lds"
836 select BOARD_EARLY_INIT_F
841 bool "Actions Semi OWL SoCs"
849 bool "QEMU Virtual Platform"
850 select ARCH_SUPPORT_TFABOOT
860 bool "Renesas ARM SoCs"
861 select BOARD_EARLY_INIT_F if !RZA1
866 imply SYS_THUMB_BUILD
867 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
869 config TARGET_S32V234EVB
870 bool "Support s32v234evb"
872 select SYS_FSL_ERRATUM_ESDHC111
874 config ARCH_SNAPDRAGON
875 bool "Qualcomm Snapdragon SoCs"
888 bool "Altera SOCFPGA family"
889 select ARCH_EARLY_INIT_R
890 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
891 select ARM64 if TARGET_SOCFPGA_STRATIX10
892 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
895 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
897 select SPL_DM_RESET if DM_RESET
899 select SPL_LIBCOMMON_SUPPORT
900 select SPL_LIBGENERIC_SUPPORT
901 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
902 select SPL_OF_CONTROL
903 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
904 select SPL_SERIAL_SUPPORT
906 select SPL_WATCHDOG_SUPPORT
909 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
911 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
912 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
921 imply SPL_LIBDISK_SUPPORT
922 imply SPL_MMC_SUPPORT
923 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
924 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
925 imply SPL_SPI_FLASH_SUPPORT
926 imply SPL_SPI_SUPPORT
930 bool "Support sunxi (Allwinner) SoCs"
933 select CMD_MMC if MMC
934 select CMD_USB if DISTRO_DEFAULTS
941 select DM_SCSI if SCSI
943 select DM_USB if DISTRO_DEFAULTS
944 select OF_BOARD_SETUP
947 select SPECIFY_CONSOLE_INDEX
948 select SPL_STACK_R if SPL
949 select SPL_SYS_MALLOC_SIMPLE if SPL
950 select SPL_SYS_THUMB_BUILD if !ARM64
953 select SYS_THUMB_BUILD if !ARM64
954 select USB if DISTRO_DEFAULTS
955 select USB_KEYBOARD if DISTRO_DEFAULTS
956 select USB_STORAGE if DISTRO_DEFAULTS
957 select USE_TINY_PRINTF
960 imply CMD_UBI if NAND
961 imply DISTRO_DEFAULTS
964 imply OF_LIBFDT_OVERLAY
965 imply PRE_CONSOLE_BUFFER
966 imply SPL_GPIO_SUPPORT
967 imply SPL_LIBCOMMON_SUPPORT
968 imply SPL_LIBGENERIC_SUPPORT
969 imply SPL_MMC_SUPPORT if MMC
970 imply SPL_POWER_SUPPORT
971 imply SPL_SERIAL_SUPPORT
975 bool "Support Xilinx Versal Platform"
985 bool "Freescale Vybrid"
987 select SYS_FSL_ERRATUM_ESDHC111
992 bool "Xilinx Zynq based platform"
993 select BOARD_EARLY_INIT_F if WDT
1003 select DM_USB if USB
1006 select SPL_BOARD_INIT if SPL
1007 select SPL_CLK if SPL
1008 select SPL_DM if SPL
1009 select SPL_OF_CONTROL if SPL
1010 select SPL_SEPARATE_BSS if SPL
1012 imply ARCH_EARLY_INIT_R
1013 imply BOARD_LATE_INIT
1019 config ARCH_ZYNQMP_R5
1020 bool "Xilinx ZynqMP R5 based platform"
1024 select DM_ETH if NET
1025 select DM_MMC if MMC
1032 bool "Xilinx ZynqMP based platform"
1036 select DM_ETH if NET
1037 select DM_MMC if MMC
1039 select DM_SPI if SPI
1040 select DM_SPI_FLASH if DM_SPI
1041 select DM_USB if USB
1043 select SPL_BOARD_INIT if SPL
1044 select SPL_CLK if SPL
1045 select SPL_SEPARATE_BSS if SPL
1047 imply BOARD_LATE_INIT
1055 imply DISTRO_DEFAULTS
1058 config TARGET_VEXPRESS64_AEMV8A
1059 bool "Support vexpress_aemv8a"
1063 config TARGET_VEXPRESS64_BASE_FVP
1064 bool "Support Versatile Express ARMv8a FVP BASE model"
1069 config TARGET_VEXPRESS64_BASE_FVP_DRAM
1070 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
1074 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
1075 the default config to allow the user to load the images directly into
1076 DRAM using model parameters rather than by using semi-hosting to load
1077 the files from the host filesystem.
1079 config TARGET_VEXPRESS64_JUNO
1080 bool "Support Versatile Express Juno Development Platform"
1084 config TARGET_LS2080A_EMU
1085 bool "Support ls2080a_emu"
1087 select ARCH_MISC_INIT
1089 select ARMV8_MULTIENTRY
1090 select FSL_DDR_SYNC_REFRESH
1092 Support for Freescale LS2080A_EMU platform
1093 The LS2080A Development System (EMULATOR) is a pre silicon
1094 development platform that supports the QorIQ LS2080A
1095 Layerscape Architecture processor.
1097 config TARGET_LS2080A_SIMU
1098 bool "Support ls2080a_simu"
1100 select ARCH_MISC_INIT
1102 select ARMV8_MULTIENTRY
1103 select BOARD_LATE_INIT
1105 Support for Freescale LS2080A_SIMU platform
1106 The LS2080A Development System (QDS) is a pre silicon
1107 development platform that supports the QorIQ LS2080A
1108 Layerscape Architecture processor.
1110 config TARGET_LS1088AQDS
1111 bool "Support ls1088aqds"
1113 select ARCH_MISC_INIT
1115 select ARMV8_MULTIENTRY
1116 select ARCH_SUPPORT_TFABOOT
1117 select BOARD_LATE_INIT
1119 select FSL_DDR_INTERACTIVE if !SD_BOOT
1121 Support for NXP LS1088AQDS platform
1122 The LS1088A Development System (QDS) is a high-performance
1123 development platform that supports the QorIQ LS1088A
1124 Layerscape Architecture processor.
1126 config TARGET_LS2080AQDS
1127 bool "Support ls2080aqds"
1129 select ARCH_MISC_INIT
1131 select ARMV8_MULTIENTRY
1132 select ARCH_SUPPORT_TFABOOT
1133 select BOARD_LATE_INIT
1138 select FSL_DDR_INTERACTIVE if !SPL
1140 Support for Freescale LS2080AQDS platform
1141 The LS2080A Development System (QDS) is a high-performance
1142 development platform that supports the QorIQ LS2080A
1143 Layerscape Architecture processor.
1145 config TARGET_LS2080ARDB
1146 bool "Support ls2080ardb"
1148 select ARCH_MISC_INIT
1150 select ARMV8_MULTIENTRY
1151 select ARCH_SUPPORT_TFABOOT
1152 select BOARD_LATE_INIT
1155 select FSL_DDR_INTERACTIVE if !SPL
1159 Support for Freescale LS2080ARDB platform.
1160 The LS2080A Reference design board (RDB) is a high-performance
1161 development platform that supports the QorIQ LS2080A
1162 Layerscape Architecture processor.
1164 config TARGET_LS2081ARDB
1165 bool "Support ls2081ardb"
1167 select ARCH_MISC_INIT
1169 select ARMV8_MULTIENTRY
1170 select BOARD_LATE_INIT
1173 Support for Freescale LS2081ARDB platform.
1174 The LS2081A Reference design board (RDB) is a high-performance
1175 development platform that supports the QorIQ LS2081A/LS2041A
1176 Layerscape Architecture processor.
1178 config TARGET_LX2160ARDB
1179 bool "Support lx2160ardb"
1181 select ARCH_MISC_INIT
1183 select ARMV8_MULTIENTRY
1184 select ARCH_SUPPORT_TFABOOT
1185 select BOARD_LATE_INIT
1187 Support for NXP LX2160ARDB platform.
1188 The lx2160ardb (LX2160A Reference design board (RDB)
1189 is a high-performance development platform that supports the
1190 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1192 config TARGET_LX2160AQDS
1193 bool "Support lx2160aqds"
1195 select ARCH_MISC_INIT
1197 select ARMV8_MULTIENTRY
1198 select ARCH_SUPPORT_TFABOOT
1199 select BOARD_LATE_INIT
1201 Support for NXP LX2160AQDS platform.
1202 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1203 is a high-performance development platform that supports the
1204 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1207 bool "Support HiKey 96boards Consumer Edition Platform"
1214 select SPECIFY_CONSOLE_INDEX
1217 Support for HiKey 96boards platform. It features a HI6220
1218 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1220 config TARGET_HIKEY960
1221 bool "Support HiKey960 96boards Consumer Edition Platform"
1229 Support for HiKey960 96boards platform. It features a HI3660
1230 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1232 config TARGET_POPLAR
1233 bool "Support Poplar 96boards Enterprise Edition Platform"
1242 Support for Poplar 96boards EE platform. It features a HI3798cv200
1243 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1244 making it capable of running any commercial set-top solution based on
1247 config TARGET_LS1012AQDS
1248 bool "Support ls1012aqds"
1251 select ARCH_SUPPORT_TFABOOT
1252 select BOARD_LATE_INIT
1254 Support for Freescale LS1012AQDS platform.
1255 The LS1012A Development System (QDS) is a high-performance
1256 development platform that supports the QorIQ LS1012A
1257 Layerscape Architecture processor.
1259 config TARGET_LS1012ARDB
1260 bool "Support ls1012ardb"
1263 select ARCH_SUPPORT_TFABOOT
1264 select BOARD_LATE_INIT
1268 Support for Freescale LS1012ARDB platform.
1269 The LS1012A Reference design board (RDB) is a high-performance
1270 development platform that supports the QorIQ LS1012A
1271 Layerscape Architecture processor.
1273 config TARGET_LS1012A2G5RDB
1274 bool "Support ls1012a2g5rdb"
1277 select ARCH_SUPPORT_TFABOOT
1278 select BOARD_LATE_INIT
1281 Support for Freescale LS1012A2G5RDB platform.
1282 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1283 development platform that supports the QorIQ LS1012A
1284 Layerscape Architecture processor.
1286 config TARGET_LS1012AFRWY
1287 bool "Support ls1012afrwy"
1290 select ARCH_SUPPORT_TFABOOT
1291 select BOARD_LATE_INIT
1295 Support for Freescale LS1012AFRWY platform.
1296 The LS1012A FRWY board (FRWY) is a high-performance
1297 development platform that supports the QorIQ LS1012A
1298 Layerscape Architecture processor.
1300 config TARGET_LS1012AFRDM
1301 bool "Support ls1012afrdm"
1304 select ARCH_SUPPORT_TFABOOT
1306 Support for Freescale LS1012AFRDM platform.
1307 The LS1012A Freedom board (FRDM) is a high-performance
1308 development platform that supports the QorIQ LS1012A
1309 Layerscape Architecture processor.
1311 config TARGET_LS1028AQDS
1312 bool "Support ls1028aqds"
1315 select ARMV8_MULTIENTRY
1316 select ARCH_SUPPORT_TFABOOT
1317 select BOARD_LATE_INIT
1318 select ARCH_MISC_INIT
1320 Support for Freescale LS1028AQDS platform
1321 The LS1028A Development System (QDS) is a high-performance
1322 development platform that supports the QorIQ LS1028A
1323 Layerscape Architecture processor.
1325 config TARGET_LS1028ARDB
1326 bool "Support ls1028ardb"
1329 select ARMV8_MULTIENTRY
1330 select ARCH_SUPPORT_TFABOOT
1332 Support for Freescale LS1028ARDB platform
1333 The LS1028A Development System (RDB) is a high-performance
1334 development platform that supports the QorIQ LS1028A
1335 Layerscape Architecture processor.
1337 config TARGET_LS1088ARDB
1338 bool "Support ls1088ardb"
1340 select ARCH_MISC_INIT
1342 select ARMV8_MULTIENTRY
1343 select ARCH_SUPPORT_TFABOOT
1344 select BOARD_LATE_INIT
1346 select FSL_DDR_INTERACTIVE if !SD_BOOT
1348 Support for NXP LS1088ARDB platform.
1349 The LS1088A Reference design board (RDB) is a high-performance
1350 development platform that supports the QorIQ LS1088A
1351 Layerscape Architecture processor.
1353 config TARGET_LS1021AQDS
1354 bool "Support ls1021aqds"
1356 select ARCH_SUPPORT_PSCI
1357 select BOARD_EARLY_INIT_F
1358 select BOARD_LATE_INIT
1360 select CPU_V7_HAS_NONSEC
1361 select CPU_V7_HAS_VIRT
1362 select LS1_DEEP_SLEEP
1365 select FSL_DDR_INTERACTIVE
1368 config TARGET_LS1021ATWR
1369 bool "Support ls1021atwr"
1371 select ARCH_SUPPORT_PSCI
1372 select BOARD_EARLY_INIT_F
1373 select BOARD_LATE_INIT
1375 select CPU_V7_HAS_NONSEC
1376 select CPU_V7_HAS_VIRT
1377 select LS1_DEEP_SLEEP
1381 config TARGET_LS1021ATSN
1382 bool "Support ls1021atsn"
1384 select ARCH_SUPPORT_PSCI
1385 select BOARD_EARLY_INIT_F
1386 select BOARD_LATE_INIT
1388 select CPU_V7_HAS_NONSEC
1389 select CPU_V7_HAS_VIRT
1390 select LS1_DEEP_SLEEP
1394 config TARGET_LS1021AIOT
1395 bool "Support ls1021aiot"
1397 select ARCH_SUPPORT_PSCI
1398 select BOARD_LATE_INIT
1400 select CPU_V7_HAS_NONSEC
1401 select CPU_V7_HAS_VIRT
1405 Support for Freescale LS1021AIOT platform.
1406 The LS1021A Freescale board (IOT) is a high-performance
1407 development platform that supports the QorIQ LS1021A
1408 Layerscape Architecture processor.
1410 config TARGET_LS1043AQDS
1411 bool "Support ls1043aqds"
1414 select ARMV8_MULTIENTRY
1415 select ARCH_SUPPORT_TFABOOT
1416 select BOARD_EARLY_INIT_F
1417 select BOARD_LATE_INIT
1419 select FSL_DDR_INTERACTIVE if !SPL
1423 Support for Freescale LS1043AQDS platform.
1425 config TARGET_LS1043ARDB
1426 bool "Support ls1043ardb"
1429 select ARMV8_MULTIENTRY
1430 select ARCH_SUPPORT_TFABOOT
1431 select BOARD_EARLY_INIT_F
1432 select BOARD_LATE_INIT
1435 Support for Freescale LS1043ARDB platform.
1437 config TARGET_LS1046AQDS
1438 bool "Support ls1046aqds"
1441 select ARMV8_MULTIENTRY
1442 select ARCH_SUPPORT_TFABOOT
1443 select BOARD_EARLY_INIT_F
1444 select BOARD_LATE_INIT
1445 select DM_SPI_FLASH if DM_SPI
1447 select FSL_DDR_BIST if !SPL
1448 select FSL_DDR_INTERACTIVE if !SPL
1449 select FSL_DDR_INTERACTIVE if !SPL
1452 Support for Freescale LS1046AQDS platform.
1453 The LS1046A Development System (QDS) is a high-performance
1454 development platform that supports the QorIQ LS1046A
1455 Layerscape Architecture processor.
1457 config TARGET_LS1046ARDB
1458 bool "Support ls1046ardb"
1461 select ARMV8_MULTIENTRY
1462 select ARCH_SUPPORT_TFABOOT
1463 select BOARD_EARLY_INIT_F
1464 select BOARD_LATE_INIT
1465 select DM_SPI_FLASH if DM_SPI
1466 select POWER_MC34VR500
1469 select FSL_DDR_INTERACTIVE if !SPL
1472 Support for Freescale LS1046ARDB platform.
1473 The LS1046A Reference Design Board (RDB) is a high-performance
1474 development platform that supports the QorIQ LS1046A
1475 Layerscape Architecture processor.
1477 config TARGET_LS1046AFRWY
1478 bool "Support ls1046afrwy"
1481 select ARMV8_MULTIENTRY
1482 select ARCH_SUPPORT_TFABOOT
1483 select BOARD_EARLY_INIT_F
1484 select BOARD_LATE_INIT
1485 select DM_SPI_FLASH if DM_SPI
1488 Support for Freescale LS1046AFRWY platform.
1489 The LS1046A Freeway Board (FRWY) is a high-performance
1490 development platform that supports the QorIQ LS1046A
1491 Layerscape Architecture processor.
1493 bool "Support h2200"
1496 config TARGET_COLIBRI_PXA270
1497 bool "Support colibri_pxa270"
1500 config ARCH_UNIPHIER
1501 bool "Socionext UniPhier SoCs"
1502 select BOARD_LATE_INIT
1510 select OF_BOARD_SETUP
1514 select SPL_BOARD_INIT if SPL
1515 select SPL_DM if SPL
1516 select SPL_LIBCOMMON_SUPPORT if SPL
1517 select SPL_LIBGENERIC_SUPPORT if SPL
1518 select SPL_OF_CONTROL if SPL
1519 select SPL_PINCTRL if SPL
1522 imply DISTRO_DEFAULTS
1525 Support for UniPhier SoC family developed by Socionext Inc.
1526 (formerly, System LSI Business Division of Panasonic Corporation)
1529 bool "Support STMicroelectronics STM32 MCU with cortex M"
1536 bool "Support STMicrolectronics SoCs"
1545 Support for STMicroelectronics STiH407/10 SoC family.
1546 This SoC is used on Linaro 96Board STiH410-B2260
1549 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1550 select ARCH_MISC_INIT
1551 select BOARD_LATE_INIT
1560 select OF_SYSTEM_SETUP
1566 select SYS_THUMB_BUILD
1570 imply OF_LIBFDT_OVERLAY
1571 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1574 Support for STM32MP SoC family developed by STMicroelectronics,
1575 MPUs based on ARM cortex A core
1576 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1577 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1579 SPL is the unsecure FSBL for the basic boot chain.
1581 config ARCH_ROCKCHIP
1582 bool "Support Rockchip SoCs"
1593 select DM_USB if USB
1594 select ENABLE_ARM_SOC_BOOT0_HOOK
1597 select SPL_DM if SPL
1598 select SPL_SYS_MALLOC_SIMPLE if SPL
1600 select SYS_THUMB_BUILD if !ARM64
1603 imply DEBUG_UART_BOARD_INIT
1604 imply DISTRO_DEFAULTS
1606 imply SARADC_ROCKCHIP
1610 imply USB_FUNCTION_FASTBOOT
1612 config TARGET_THUNDERX_88XX
1613 bool "Support ThunderX 88xx"
1617 select SYS_CACHE_SHIFT_7
1620 bool "Support Aspeed SoCs"
1627 config ARCH_SUPPORT_TFABOOT
1631 bool "Support for booting from TF-A"
1632 depends on ARCH_SUPPORT_TFABOOT
1635 Enabling this will make a U-Boot binary that is capable of being
1638 config TI_SECURE_DEVICE
1639 bool "HS Device Type Support"
1640 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1642 If a high secure (HS) device type is being used, this config
1643 must be set. This option impacts various aspects of the
1644 build system (to create signed boot images that can be
1645 authenticated) and the code. See the doc/README.ti-secure
1646 file for further details.
1648 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1649 config ISW_ENTRY_ADDR
1650 hex "Address in memory or XIP address of bootloader entry point"
1651 default 0x402F4000 if AM43XX
1652 default 0x402F0400 if AM33XX
1653 default 0x40301350 if OMAP54XX
1655 After any reset, the boot ROM searches the boot media for a valid
1656 boot image. For non-XIP devices, the ROM then copies the image into
1657 internal memory. For all boot modes, after the ROM processes the
1658 boot image it eventually computes the entry point address depending
1659 on the device type (secure/non-secure), boot media (xip/non-xip) and
1663 source "arch/arm/mach-aspeed/Kconfig"
1665 source "arch/arm/mach-at91/Kconfig"
1667 source "arch/arm/mach-bcm283x/Kconfig"
1669 source "arch/arm/mach-bcmstb/Kconfig"
1671 source "arch/arm/mach-davinci/Kconfig"
1673 source "arch/arm/mach-exynos/Kconfig"
1675 source "arch/arm/mach-highbank/Kconfig"
1677 source "arch/arm/mach-integrator/Kconfig"
1679 source "arch/arm/mach-k3/Kconfig"
1681 source "arch/arm/mach-keystone/Kconfig"
1683 source "arch/arm/mach-kirkwood/Kconfig"
1685 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1687 source "arch/arm/mach-mvebu/Kconfig"
1689 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1691 source "arch/arm/mach-imx/mx2/Kconfig"
1693 source "arch/arm/mach-imx/mx3/Kconfig"
1695 source "arch/arm/mach-imx/mx5/Kconfig"
1697 source "arch/arm/mach-imx/mx6/Kconfig"
1699 source "arch/arm/mach-imx/mx7/Kconfig"
1701 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1703 source "arch/arm/mach-imx/imx8/Kconfig"
1705 source "arch/arm/mach-imx/imx8m/Kconfig"
1707 source "arch/arm/mach-imx/mxs/Kconfig"
1709 source "arch/arm/mach-omap2/Kconfig"
1711 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1713 source "arch/arm/mach-orion5x/Kconfig"
1715 source "arch/arm/mach-owl/Kconfig"
1717 source "arch/arm/mach-rmobile/Kconfig"
1719 source "arch/arm/mach-meson/Kconfig"
1721 source "arch/arm/mach-mediatek/Kconfig"
1723 source "arch/arm/mach-qemu/Kconfig"
1725 source "arch/arm/mach-rockchip/Kconfig"
1727 source "arch/arm/mach-s5pc1xx/Kconfig"
1729 source "arch/arm/mach-snapdragon/Kconfig"
1731 source "arch/arm/mach-socfpga/Kconfig"
1733 source "arch/arm/mach-sti/Kconfig"
1735 source "arch/arm/mach-stm32/Kconfig"
1737 source "arch/arm/mach-stm32mp/Kconfig"
1739 source "arch/arm/mach-sunxi/Kconfig"
1741 source "arch/arm/mach-tegra/Kconfig"
1743 source "arch/arm/mach-uniphier/Kconfig"
1745 source "arch/arm/cpu/armv7/vf610/Kconfig"
1747 source "arch/arm/mach-zynq/Kconfig"
1749 source "arch/arm/mach-zynqmp/Kconfig"
1751 source "arch/arm/mach-versal/Kconfig"
1753 source "arch/arm/mach-zynqmp-r5/Kconfig"
1755 source "arch/arm/cpu/armv7/Kconfig"
1757 source "arch/arm/cpu/armv8/Kconfig"
1759 source "arch/arm/mach-imx/Kconfig"
1761 source "board/bosch/shc/Kconfig"
1762 source "board/bosch/guardian/Kconfig"
1763 source "board/CarMediaLab/flea3/Kconfig"
1764 source "board/Marvell/aspenite/Kconfig"
1765 source "board/Marvell/gplugd/Kconfig"
1766 source "board/armadeus/apf27/Kconfig"
1767 source "board/armltd/vexpress/Kconfig"
1768 source "board/armltd/vexpress64/Kconfig"
1769 source "board/broadcom/bcm23550_w1d/Kconfig"
1770 source "board/broadcom/bcm28155_ap/Kconfig"
1771 source "board/broadcom/bcm963158/Kconfig"
1772 source "board/broadcom/bcm968580xref/Kconfig"
1773 source "board/broadcom/bcmcygnus/Kconfig"
1774 source "board/broadcom/bcmnsp/Kconfig"
1775 source "board/broadcom/bcmns2/Kconfig"
1776 source "board/cavium/thunderx/Kconfig"
1777 source "board/cirrus/edb93xx/Kconfig"
1778 source "board/eets/pdu001/Kconfig"
1779 source "board/emulation/qemu-arm/Kconfig"
1780 source "board/freescale/ls2080a/Kconfig"
1781 source "board/freescale/ls2080aqds/Kconfig"
1782 source "board/freescale/ls2080ardb/Kconfig"
1783 source "board/freescale/ls1088a/Kconfig"
1784 source "board/freescale/ls1028a/Kconfig"
1785 source "board/freescale/ls1021aqds/Kconfig"
1786 source "board/freescale/ls1043aqds/Kconfig"
1787 source "board/freescale/ls1021atwr/Kconfig"
1788 source "board/freescale/ls1021atsn/Kconfig"
1789 source "board/freescale/ls1021aiot/Kconfig"
1790 source "board/freescale/ls1046aqds/Kconfig"
1791 source "board/freescale/ls1043ardb/Kconfig"
1792 source "board/freescale/ls1046ardb/Kconfig"
1793 source "board/freescale/ls1046afrwy/Kconfig"
1794 source "board/freescale/ls1012aqds/Kconfig"
1795 source "board/freescale/ls1012ardb/Kconfig"
1796 source "board/freescale/ls1012afrdm/Kconfig"
1797 source "board/freescale/lx2160a/Kconfig"
1798 source "board/freescale/mx35pdk/Kconfig"
1799 source "board/freescale/s32v234evb/Kconfig"
1800 source "board/grinn/chiliboard/Kconfig"
1801 source "board/gumstix/pepper/Kconfig"
1802 source "board/h2200/Kconfig"
1803 source "board/hisilicon/hikey/Kconfig"
1804 source "board/hisilicon/hikey960/Kconfig"
1805 source "board/hisilicon/poplar/Kconfig"
1806 source "board/isee/igep003x/Kconfig"
1807 source "board/phytec/pcm051/Kconfig"
1808 source "board/silica/pengwyn/Kconfig"
1809 source "board/spear/spear300/Kconfig"
1810 source "board/spear/spear310/Kconfig"
1811 source "board/spear/spear320/Kconfig"
1812 source "board/spear/spear600/Kconfig"
1813 source "board/spear/x600/Kconfig"
1814 source "board/st/stv0991/Kconfig"
1815 source "board/tcl/sl50/Kconfig"
1816 source "board/ucRobotics/bubblegum_96/Kconfig"
1817 source "board/birdland/bav335x/Kconfig"
1818 source "board/toradex/colibri_pxa270/Kconfig"
1819 source "board/variscite/dart_6ul/Kconfig"
1820 source "board/vscom/baltos/Kconfig"
1821 source "board/woodburn/Kconfig"
1822 source "board/xilinx/Kconfig"
1823 source "board/xilinx/zynq/Kconfig"
1824 source "board/xilinx/zynqmp/Kconfig"
1826 source "arch/arm/Kconfig.debug"
1831 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1832 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1833 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64