1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright(c) 2015 EZchip Technologies.
6 #ifndef _PLAT_EZNPS_MTM_H
7 #define _PLAT_EZNPS_MTM_H
11 static inline void *nps_mtm_reg_addr(u32 cpu, u32 reg)
18 blkid = (((core & 0x0C) << 2) | (core & 0x03));
20 return nps_host_reg(cpu, blkid, reg);
23 #ifdef CONFIG_EZNPS_MTM_EXT
24 #define NPS_CPU_TO_THREAD_NUM(cpu) \
25 ({ struct global_id gid; gid.value = cpu; gid.thread; })
28 #define MTM_CFG(cpu) nps_mtm_reg_addr(cpu, 0x81)
29 #define MTM_THR_INIT(cpu) nps_mtm_reg_addr(cpu, 0x92)
30 #define MTM_THR_INIT_STS(cpu) nps_mtm_reg_addr(cpu, 0x93)
32 #define get_thread(map) map.thread
33 #define eznps_max_cpus 4096
34 #define eznps_cpus_per_cluster 256
36 void mtm_enable_core(unsigned int cpu);
37 int mtm_enable_thread(int cpu);
38 #else /* !CONFIG_EZNPS_MTM_EXT */
40 #define get_thread(map) 0
41 #define eznps_max_cpus 256
42 #define eznps_cpus_per_cluster 16
43 #define mtm_enable_core(cpu)
44 #define mtm_enable_thread(cpu) 1
45 #define NPS_CPU_TO_THREAD_NUM(cpu) 0
47 #endif /* CONFIG_EZNPS_MTM_EXT */
49 #endif /* _PLAT_EZNPS_MTM_H */