2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <asm-offsets.h>
9 #include <linux/linkage.h>
10 #include <asm/arcregs.h>
13 /* Setup interrupt vector base that matches "__text_start" */
14 sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
16 ; Disable/enable I-cache according to configuration
17 lr r5, [ARC_BCR_IC_BUILD]
18 breq r5, 0, 1f ; I$ doesn't exist
19 lr r5, [ARC_AUX_IC_CTRL]
20 #ifndef CONFIG_SYS_ICACHE_OFF
21 bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
23 bset r5, r5, 0 ; I$ exists, but is not used
25 sr r5, [ARC_AUX_IC_CTRL]
28 ; Disable/enable D-cache according to configuration
29 lr r5, [ARC_BCR_DC_BUILD]
30 breq r5, 0, 1f ; D$ doesn't exist
31 lr r5, [ARC_AUX_DC_CTRL]
32 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
33 #ifndef CONFIG_SYS_DCACHE_OFF
34 bclr r5, r5, 0 ; Enable (+Inv)
36 bset r5, r5, 0 ; Disable (+Inv)
38 sr r5, [ARC_AUX_DC_CTRL]
41 #ifdef CONFIG_ISA_ARCV2
42 ; Disable System-Level Cache (SLC)
44 breq r5, 0, 1f ; SLC doesn't exist
45 lr r5, [ARC_AUX_SLC_CTRL]
46 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
47 bclr r5, r5, 0 ; Enable (+Inv)
48 sr r5, [ARC_AUX_SLC_CTRL]
53 /* Setup stack- and frame-pointers */
54 mov %sp, CONFIG_SYS_INIT_SP_ADDR
57 /* Allocate and zero GD, update SP */
61 /* Update stack- and frame-pointers */
65 /* Zero the one and only argument of "board_init_f" */
71 * void board_init_f_r_trampoline(stack-pointer address)
73 * This "function" does not return, instead it continues in RAM
74 * after relocating the monitor code.
76 * r0 = new stack-pointer
78 ENTRY(board_init_f_r_trampoline)
79 /* Set up the stack- and frame-pointers */
83 /* Update position of intterupt vector table */
84 lr %r0, [ARC_AUX_INTR_VEC_BASE]
85 ld %r1, [%r25, GD_RELOC_OFF]
87 sr %r0, [ARC_AUX_INTR_VEC_BASE]
89 /* Re-enter U-Boot by calling board_init_f_r */
91 ENDPROC(board_init_f_r_trampoline)