2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _ASM_ARC_ARCREGS_H
8 #define _ASM_ARC_ARCREGS_H
11 * ARC architecture has additional address space - auxiliary registers.
12 * These registers are mostly used for configuration purposes.
13 * These registers are not memory mapped and special commands are used for
17 #define ARC_AUX_IDENTITY 0x04
18 #define ARC_AUX_STATUS32 0x0a
20 /* Instruction cache related auxiliary registers */
21 #define ARC_AUX_IC_IVIC 0x10
22 #define ARC_AUX_IC_CTRL 0x11
23 #define ARC_AUX_IC_IVIL 0x19
24 #if (CONFIG_ARC_MMU_VER > 2)
25 #define ARC_AUX_IC_PTAG 0x1E
28 /* Timer related auxiliary registers */
29 #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
30 #define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
31 #define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
33 #define ARC_AUX_INTR_VEC_BASE 0x25
35 /* Data cache related auxiliary registers */
36 #define ARC_AUX_DC_IVDC 0x47
37 #define ARC_AUX_DC_CTRL 0x48
39 #define ARC_AUX_DC_IVDL 0x4A
40 #define ARC_AUX_DC_FLSH 0x4B
41 #define ARC_AUX_DC_FLDL 0x4C
42 #if (CONFIG_ARC_MMU_VER > 2)
43 #define ARC_AUX_DC_PTAG 0x5C
47 /* Accessors for auxiliary registers */
48 #define read_aux_reg(reg) __builtin_arc_lr(reg)
50 /* gcc builtin sr needs reg param to be long immediate */
51 #define write_aux_reg(reg_immed, val) \
52 __builtin_arc_sr((unsigned int)val, reg_immed)
53 #endif /* __ASSEMBLY__ */
55 #endif /* _ASM_ARC_ARCREGS_H */