1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
12 compatible = "simple-bus";
15 ranges = <0x00000000 0xe0000000 0x10000000>;
19 compatible = "simple-bus";
23 compatible = "fixed-clock";
24 clock-frequency = <50000000>;
29 compatible = "fixed-clock";
30 clock-frequency = <33333333>;
37 compatible = "altr,socfpga-stmmac";
38 reg = < 0x18000 0x2000 >;
42 clock-names = "stmmaceth";
47 compatible = "generic-ehci";
48 reg = < 0x40000 0x100 >;
52 compatible = "generic-ohci";
53 reg = < 0x60000 0x100 >;
56 uart0: serial0@22000 {
57 compatible = "snps,dw-apb-uart";
58 reg = <0x22000 0x100>;
65 compatible = "snps,dw-apb-ssi";
69 spi-max-frequency = <4000000>;
71 clock-names = "spi_clk";
72 cs-gpio = <&cs_gpio 0>;
74 compatible = "jedec,spi-nor";
76 spi-max-frequency = <4000000>;
81 compatible = "snps,creg-gpio";
85 gpio-bank-name = "axs-spi-cs";
87 gpio-first-shift = <0>;
88 gpio-bit-per-line = <2>;
89 gpio-activate-val = <1>;
90 gpio-deactivate-val = <3>;
91 gpio-default-val = <1>;