arm: mach-omap2: cache: Explicitly enable I cache
[oweals/u-boot.git] / arch / arc / cpu / arcv1 / ivt.S
1 /*
2  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 .section .ivt, "ax",@progbits
8 .align 4
9 _ivt:
10         /* Critical system events */
11         j       _start                  /* 0 - 0x000 */
12         j       memory_error            /* 1 - 0x008 */
13         j       instruction_error       /* 2 - 0x010 */
14
15         /* Device interrupts */
16 .rept   29
17         j       interrupt_handler       /* 3:31 - 0x018:0xF8 */
18 .endr
19         /* Exceptions */
20         j       EV_MachineCheck         /* 0x100, Fatal Machine check  (0x20) */
21         j       EV_TLBMissI             /* 0x108, Intruction TLB miss  (0x21) */
22         j       EV_TLBMissD             /* 0x110, Data TLB miss        (0x22) */
23         j       EV_TLBProtV             /* 0x118, Protection Violation (0x23)
24                                                         or Misaligned Access  */
25         j       EV_PrivilegeV           /* 0x120, Privilege Violation  (0x24) */
26         j       EV_Trap                 /* 0x128, Trap exception       (0x25) */
27         j       EV_Extension            /* 0x130, Extn Intruction Excp (0x26) */